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Travelled to:
1 × France
1 × USA
3 × Germany
Collaborated with:
G.Palermo O.Villa J.Carretero T.Ramírez X.Vera C.Silvano E.Herrero P.Schaumont I.Verbauwhede J.Abella A.González A.Tumeo M.Branca L.Camerini M.Ceriani F.Ferrandi D.Sciuto
Talks about:
multiprocessor (2) hardwar (2) system (2) applic (2) framework (1) synchron (1) prioriti (1) diagnosi (1) softwar (1) perform (1)

Person: Matteo Monchiero

DBLP DBLP: Monchiero:Matteo

Contributed to:

DATE 20132013
HPCA 20112011
DATE 20082008
DATE 20062006
DATE 20052005

Wrote 5 papers:

DATE-2013-CarreteroHMRV
Capturing vulnerability variations for register files (JC, EH, MM, TR, XV), pp. 1468–1473.
HPCA-2011-CarreteroVARMG #hardware #process #using
Hardware/software-based diagnosis of load-store queues using expandable activity logs (JC, XV, JA, TR, MM, AG), pp. 321–331.
DATE-2008-TumeoBCCMPFS #multi #realtime
A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive Applications (AT, MB, LC, MC, MM, GP, FF, DS), pp. 1039–1044.
DATE-2006-MonchieroPSV #hardware #optimisation #performance
Power/performance hardware optimization for synchronization intensive applications in MPSoCs (MM, GP, CS, OV), pp. 606–611.
DATE-2005-VillaSVMP #framework #integration #memory management #multi #performance
Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip (OV, PS, IV, MM, GP), pp. 804–805.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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