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Travelled to:
1 × France
1 × India
1 × Spain
13 × USA
2 × Germany
Collaborated with:
J.Parcerisa J.Abella R.Canal F.J.Sánchez J.Tubella P.Marcuello J.González E.Gibert J.M.Codina A.Aletà D.R.Kaeli P.Chaparro S.Ganapathy A.Rubio J.Carretero X.Vera E.Quiñones J.E.Smith J.L.Aragón M.Valero D.Royo M.Valero-García A.Brankovic K.Stavrou R.Ranjan F.Latorre I.Bhagat G.Magklis T.M.Jones M.F.P.O'Boyle D.Alexandrescu E.Costenaro T.Ramírez M.Monchiero C.G.Quiñones C.Madriles D.M.Tullsen
Talks about:
specul (5) processor (4) cluster (4) base (4) multithread (3) distribut (3) softwar (3) schedul (3) control (3) thread (3)

Person: Antonio González

DBLP DBLP: Gonz=aacute=lez:Antonio

Contributed to:

CGO 20142014
DATE 20142014
HPCA 20112011
LCTES 20112011
DATE 20102010
HPCA 20102010
CGO 20072007
HPCA 20072007
HPCA 20052005
PLDI 20052005
CGO 20042004
HPCA 20042004
CGO 20032003
HPCA 20032003
HPCA 20022002
HPCA 20002000
HPCA 19991999
HPCA 19981998
PDP 19981998
PDP 19951995
PDP 19941994

Wrote 26 papers:

CGO-2014-BrankovicSGG #simulation
Warm-Up Simulation Methodology for HW/SW Co-Designed Processors (AB, KS, EG, AG), p. 284.
DATE-2014-GanapathyCACGR #analysis #framework #memory management #named #robust
INFORMER: An integrated framework for early-stage memory robustness analysis (SG, RC, DA, EC, AG, AR), pp. 1–4.
HPCA-2011-CarreteroVARMG #hardware #process #using
Hardware/software-based diagnosis of load-store queues using expandable activity logs (JC, XV, JA, TR, MM, AG), pp. 321–331.
HPCA-2011-RanjanLMG #clustering #concurrent #multi #named #thread
Fg-STP: Fine-Grain Single Thread Partitioning on Multicores (RR, FL, PM, AG), pp. 15–24.
LCTES-2011-BhagatGSG #effectiveness #optimisation
Global productiveness propagation: a code optimization technique to speculatively prune useless narrow computations (IB, EG, FJS, AG), pp. 161–170.
DATE-2010-GanapathyCGR #estimation #modelling #multi #variability
Circuit propagation delay estimation through multivariate regression-based modeling under spatio-temporal variability (SG, RC, AG, AR), pp. 417–422.
High-Performance low-vcc in-order core (JA, PC, XV, JC, AG), pp. 1–11.
CGO-2007-AletaCGK #architecture #clustering
Heterogeneous Clustered VLIW Microarchitectures (AA, JMC, AG, DRK), pp. 354–366.
CGO-2007-CodinaSG #clustering #graph #scheduling
Virtual Cluster Scheduling Through the Scheduling Graph (JMC, FJS, AG), pp. 89–101.
HPCA-2007-QuinonesPG #branch #execution #predict
Improving Branch Prediction and Predicated Execution in Out-of-Order Processors (EQ, JMP, AG), pp. 75–84.
HPCA-2005-ChaparroMGG #reduction
Distributing the Frontend for Temperature Reduction (PC, GM, JG, AG), pp. 61–70.
HPCA-2005-JonesOAG #queue #reduction
Software Directed Issue Queue Power Reduction (TMJ, MFPO, JA, AG), pp. 144–153.
PLDI-2005-AletaCGK #on the fly
Demystifying on-the-fly spill code (AA, JMC, AG, DRK), pp. 180–189.
PLDI-2005-QuinonesMSMGT #compilation #framework #slicing #thread
Mitosis compiler: an infrastructure for speculative threading based on pre-computation slices (CGQ, CM, FJS, PM, AG, DMT), pp. 269–279.
Software-Controlled Operand-Gating (RC, AG, JES), pp. 125–136.
HPCA-2004-AbellaG #distributed #queue
Low-Complexity Distributed Issue Queue (JA, AG), pp. 73–83.
CGO-2003-GibertSG #clustering #distributed #memory management #scheduling
Local Scheduling Techniques for Memory Coherence in a Clustered VLIW Processor with a Distributed Data Cache (EG, FJS, AG), pp. 193–203.
HPCA-2003-AragonGG #power management
Power-Aware Control Speculation through Selective Throttling (JLA, JG, AG), pp. 103–112.
HPCA-2002-MarcuelloG #multi #thread
Thread-Spawning Schemes for Speculative Multithreading (PM, AG), pp. 55–64.
HPCA-2000-CanalPG #clustering
Dynamic Cluster Assignment Mechanisms (RC, JMP, AG), pp. 133–142.
HPCA-1999-ParcerisaG #multi #thread
The Synergy of Multithreading and Access/Execute Decoupling (JMP, AG), pp. 59–63.
Virtual-Physical Registers (AG, JG, MV), pp. 175–184.
HPCA-1998-TubellaG #detection #parallel #thread
Control Speculation in Multithreaded Processors through Dynamic Loop Detection (JT, AG), pp. 14–23.
PDP-1998-RoyoVG #2d #algorithm #symmetry
A Jacobi-based algorithm for computing symmetric eigenvalues and eigenvectors in a two-dimensional mesh (DR, MVG, AG), pp. 463–469.
PDP-1995-TubellaG #logic programming #parallel
Exploiting path parallelism in logic programming (JT, AG), pp. 164–173.
PDP-1994-Gonzalez #algorithm #parallel
Parallel Numerical Algorithms (AG), pp. 238–239.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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