Travelled to:1 × France
1 × Germany
Collaborated with:A.Wortmann S.Simon A.G.Braun J.Gerlach W.Rosenstiel D.Nienhüser J.M.Zöllner O.Bringmann
Talks about:implement (2) core (2) architectur (1) transceiv (1) synthesiz (1) recognit (1) traffic (1) automot (1) target (1) system (1)
Person: Matthias Müller
DBLP: M=uuml=ller:Matthias
Contributed to:
20102004Wrote 2 papers:
- DATE-2010-MullerBGRNZB #design #implementation #manycore #recognition
- Design of an automotive traffic sign recognition system targeting a multi-core SoC implementation (MM, AGB, JG, WR, DN, JMZ, OB), pp. 532–537.
- DATE-DF-2004-WortmannSM #architecture #performance
- A High-Speed Transceiver Architecture Implementable as Synthesizable IP Core (AW, SS, MM), pp. 46–51.