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Travelled to:
1 × France
1 × Germany
5 × USA
Collaborated with:
L.T.Pileggi T.Lin H.Zheng B.Krauter A.Devgan
Talks about:
model (7) induct (5) extract (4) chip (3) circuit (2) window (2) analys (2) interconnect (1) distribut (1) simplifi (1)

Person: Michael W. Beattie

DBLP DBLP: Beattie:Michael_W=

Contributed to:

DAC 20052005
DAC 20022002
DATE 20022002
DAC 20012001
DATE 20012001
DAC 19991999
DAC 19971997

Wrote 9 papers:

DAC-2005-BeattieZDK #3d #distributed #modelling
Spatially distributed 3D circuit models (MWB, HZ, AD, BK), pp. 153–158.
DAC-2002-LinBP #2d #modelling #on the
On the efficacy of simplified 2D on-chip inductance models (TL, MWB, LTP), pp. 757–762.
DATE-2002-LinBP #3d #modelling #question
On-Chip Inductance Models: 3D or Not 3D? (TL, MWB, LTP), p. 1112.
DATE-2002-ZhengPBK #analysis #modelling #scalability
Window-Based Susceptance Models for Large-Scale RLC Circuit Analyses (HZ, LTP, MWB, BK), pp. 628–633.
DAC-2001-BeattieP #modelling
Inductance 101: Modeling and Extraction (MWB, LTP), pp. 323–328.
DAC-2001-BeattieP01a #modelling
Modeling Magnetic Coupling for On-Chip Interconnect (MWB, LTP), pp. 335–340.
DATE-2001-BeattieP #performance
Efficient inductance extraction via windowing (MWB, LTP), pp. 430–436.
DAC-1999-BeattieP #analysis #modelling
IC Analyses Including Extracted Inductance Models (MWB, LTP), pp. 915–920.
DAC-1997-BeattieP #bound
Bounds for BEM Capacitance Extraction (MWB, LTP), pp. 133–136.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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