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Travelled to:
1 × France
6 × USA
Collaborated with:
L.T.Pileggi D.Widiger C.V.Kashyap M.W.Beattie H.Zheng S.Mehrotra R.Gupta J.Willis A.Devgan Y.Xia E.A.Dengi H.Su F.Liu B.Tutuianu
Talks about:
nois (4) analysi (3) model (3) interconnect (2) function (2) frequenc (2) extract (2) circuit (2) capacit (2) method (2)

Person: Byron Krauter

DBLP DBLP: Krauter:Byron

Contributed to:

DAC 20052005
DAC 20022002
DATE 20022002
DAC 20002000
DAC 19981998
DAC 19961996
DAC 19951995

Wrote 9 papers:

DAC-2005-BeattieZDK #3d #distributed #modelling
Spatially distributed 3D circuit models (MWB, HZ, AD, BK), pp. 153–158.
DAC-2005-SuWKLK #analysis #effectiveness #embedded #functional #performance
A noise-driven effective capacitance method with fast embedded noise rule calculation for functional noise analysis (HS, DW, CVK, FL, BK), pp. 186–189.
DAC-2002-KrauterW #analysis
Variable frequency crosstalk noise analysis: : a methodology to guarantee functionality from dc to fmax (BK, DW), pp. 665–668.
DATE-2002-ZhengPBK #analysis #modelling #scalability
Window-Based Susceptance Models for Large-Scale RLC Circuit Analyses (HZ, LTP, MWB, BK), pp. 628–633.
A realizable driving point model for on-chip interconnect with inductance (CVK, BK), pp. 190–195.
DAC-1998-KrauterM #analysis #layout
Layout Based Frequency Dependent Inductance and Resistance Extraction for On-Chip Interconnect Timing Analysis (BK, SM), pp. 303–308.
DAC-1996-KrauterXDP #image
A Sparse Image Method for BEM Capacitance Extraction (BK, YX, EAD, LTP), pp. 357–362.
DAC-1995-GuptaKTWP #bound
The Elmore Delay as a Bound for RC Trees with Generalized Input Signals (RG, BK, BT, JW, LTP), pp. 364–369.
DAC-1995-KrauterGWP #synthesis
Transmission Line Synthesis (BK, RG, JW, LTP), pp. 358–363.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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