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Travelled to:
2 × USA
4 × Germany
Collaborated with:
J.Jaffari A.Kumar M.I.Elmasry H.Mangassarian A.Y.Hamouda K.S.Karim H.Hassan A.E.Daher M.Mahmoud S.Areibi M.H.Abu-Rahma K.Chowdhury J.Wang Z.Chen S.S.Yoon
Talks about:
circuit (3) leakag (3) yield (3) power (3) techniqu (2) retarget (2) statist (2) analysi (2) reduct (2) effici (2)

Person: Mohab Anis

DBLP DBLP: Anis:Mohab

Contributed to:

DATE 20122012
DATE 20102010
DAC 20082008
DATE 20062006
DATE 20052005
DAC 20022002

Wrote 8 papers:

DATE-2012-HamoudaAK #automation #image #modelling #novel
AIR (Aerial Image Retargeting): A novel technique for in-fab automatic model-based retargeting-for-yield (AYH, MA, KSK), pp. 1603–1608.
DATE-2010-JaffariA #estimation #monte carlo
Practical Monte-Carlo based timing yield estimation of digital circuits (JJ, MA), pp. 807–812.
DATE-2010-JaffariA10a #analysis #correlation #performance #variability
Correlation controlled sampling for efficient variability analysis of analog circuits (JJ, MA), pp. 1305–1308.
DAC-2008-Abu-RahmaCWCYA #estimation #statistics
A methodology for statistical estimation of read access yield in SRAMs (MHAR, KC, JW, ZC, SSY, MA), pp. 205–210.
DATE-2006-KumarA #power management
An analytical state dependent leakage power model for FPGAs (AK, MA), pp. 612–617.
DATE-2005-HassanADE #power management #process #reduction
Activity Packing in FPGAs for Leakage Power Reduction (HH, MA, AED, MIE), pp. 212–217.
DATE-2005-MangassarianA #analysis #on the #statistics
On Statistical Timing Analysis with Inter- and Intra-Die Variations (HM, MA), pp. 132–137.
DAC-2002-AnisMEA #automation #clustering #performance #power management #reduction #using
Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique (MA, MM, MIE, SA), pp. 480–485.

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