Travelled to:
1 × France
3 × Germany
Collaborated with:
A.G.Veneris M.Anis B.Le B.Keng A.Goultiaeva F.Bacchus S.Safarpour F.N.Najm M.S.Abadir
Talks about:
domin (2) use (2) preprocess (1) statist (1) satisfi (1) maximum (1) leverag (1) environ (1) circuit (1) boolean (1)
Person: Hratch Mangassarian
DBLP: Mangassarian:Hratch
Contributed to:
Wrote 4 papers:
- DATE-2012-LeMKV #debugging #satisfiability #using
- Non-solution implications using reverse domination in a modern SAT-based debugging environment (BL, HM, BK, AGV), pp. 629–634.
- DATE-2010-MangassarianLGVB #preprocessor
- Leveraging dominators for preprocessing QBF (HM, BL, AG, AGV, FB), pp. 1695–1700.
- DATE-2007-MangassarianVSNA #estimation #process #pseudo #satisfiability #using
- Maximum circuit activity estimation using pseudo-boolean satisfiability (HM, AGV, SS, FNN, MSA), pp. 1538–1543.
- DATE-2005-MangassarianA #analysis #on the #statistics
- On Statistical Timing Analysis with Inter- and Intra-Die Variations (HM, MA), pp. 132–137.