Travelled to:4 × USA
Collaborated with:T.Saito T.Uehara F.Maruyama H.Sugimoto M.Yamazaki S.Hirose M.Saitoh K.Iwata A.Nokamura M.Kakegawa J.Masuda H.Hamamura F.Hirose
Talks about:system (4) logic (4) design (3) base (3) techniqu (2) synthesi (2) verif (2) simul (2) use (2) processor (1)
Person: Nobuaki Kawato
DBLP: Kawato:Nobuaki
Contributed to:
19881986198219811979Wrote 6 papers:
- DAC-1988-SaitohINKMHHK #logic #simulation #using
- Logic Simulation System Using Simulation Processor (SP) (MS, KI, AN, MK, JM, HH, FH, NK), pp. 225–230.
- DAC-1986-SaitoSYK #array #logic #rule-based #synthesis
- A rule-based logic circuit synthesis system for CMOS gate arrays (TS, HS, MY, NK), pp. 594–600.
- DAC-1982-KawatoUHS #interactive #logic #synthesis
- An interactive logic synthesis system based upon AI techniques (NK, TU, SH, TS), pp. 858–864.
- DAC-1982-MaruyamaUKS #design #hardware #verification
- A verification technique for hardware designs (FM, TU, NK, TS), pp. 832–841.
- DAC-1981-SaitoUK #design #logic
- A CAD system for logic design based on frames and demons (TS, TU, NK), pp. 451–456.
- DAC-1979-KawatoSMU #design #scalability #using #verification
- Design and verification of large-scale computers by using DDL (NK, TS, FM, TU), pp. 360–366.