Travelled to:
1 × Germany
Collaborated with:
W.Zhang Y.Zhu W.Yu L.Zhang R.Shi H.Peng Z.Zhu L.Chua-Eoan R.Murgai T.Shibuya C.Cheng
Talks about:
network (1) voltag (1) violat (1) domain (1) worst (1) power (1) multi (1) clock (1) gate (1) find (1)
Person: Nuriyoki Ito
DBLP: Ito:Nuriyoki
Contributed to:
Wrote 1 papers:
- DATE-2008-ZhangZYZSPZCMSIC #multi #network
- Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network (WZ, YZ, WY, LZ, RS, HP, ZZ, LCE, RM, TS, NI, CKC), pp. 537–540.