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Travelled to:
3 × USA
Collaborated with:
M.Martonosi Q.Wu D.W.Clark H.Oki Y.Wang L.Peh D.Rubenstein
Talks about:
frequenc (2) multipl (2) control (2) voltag (2) domain (2) clock (2) microprocessor (1) processor (1) tradeoff (1) reaction (1)

Person: Philo Juang

DBLP DBLP: Juang:Philo

Contributed to:

HPCA 20052005
ASPLOS 20042004
ASPLOS 20022002

Wrote 3 papers:

HPCA-2005-WuJMC #adaptation #multi
Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain Processors (QW, PJ, MM, DWC), pp. 178–189.
ASPLOS-2004-WuJMC #multi #online
Formal online methods for voltage/frequency control in multiple clock domain microprocessors (QW, PJ, MM, DWC), pp. 248–259.
ASPLOS-2002-JuangOWMPR #case study #design #energy #experience #trade-off
Energy-efficient computing for wildlife tracking: design tradeoffs and early experiences with ZebraNet (PJ, HO, YW, MM, LSP, DR), pp. 96–107.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.