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Travelled to:
1 × Canada
1 × France
3 × USA
Collaborated with:
G.Gopalakrishnan H.M.Jacobson V.N.Kravets P.Jain S.M.Nowick Y.Chan L.B.Lacey G.A.Northrop T.E.Rosser W.E.Donath L.Stok P.Villarrubia L.N.Reddy A.Sullivan K.Chakraborty
Talks about:
synthesi (3) circuit (3) techniqu (2) chang (2) microprocessor (1) methodolog (1) transform (1) placement (1) distribut (1) synchron (1)

Person: Prabhakar Kudva

DBLP DBLP: Kudva:Prabhakar

Contributed to:

DAC 20042004
DAC 20032003
DATE 20002000
DAC 19961996
CAV 19921992

Wrote 6 papers:

DAC-2004-KravetsK #optimisation
Implicit enumeration of structural changes in circuit optimization (VNK, PK), pp. 438–441.
DAC-2003-ChanKLNR #performance #physics #synthesis
Physical synthesis methodology for high performance microprocessors (YHC, PK, LBL, GAN, TER), pp. 696–701.
DATE-2000-DonathKSVRSC #synthesis
Transformational Placement and Synthesis (WED, PK, LS, PV, LNR, AS, KC), pp. 194–201.
DAC-1996-KudvaGJ #distributed
A Technique for Synthesizing Distributed Burst-mode Circuits (PK, GG, HMJ), pp. 67–70.
DAC-1996-KudvaGJN #multi #network #synthesis
Synthesis for Hazard-free Customized CMOS Complex-Gate Networks Under Multiple-Input Changes (PK, GG, HMJ, SMN), pp. 77–82.
CAV-1992-JainKG #scalability #towards #verification
Towards a Verification Technique for Large Synchronous Circuits (PJ, PK, GG), pp. 109–122.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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