Travelled to:3 × USA
Collaborated with:R.Kanj S.R.Nassif H.F.Dadgour K.Banerjee Z.Li J.Hayes E.Eken Y.Zhang W.Wen H.Li Y.Chen
Talks about:architectur (1) presenc (1) analysi (1) variat (1) scheme (1) mixtur (1) keeper (1) import (1) failur (1) design (1)
Person: Rajiv V. Joshi
DBLP: Joshi:Rajiv_V=
Contributed to:
201420122006Wrote 4 papers:
- DAC-2014-EkenZWJLC #self
- A New Field-assisted Access Scheme of STT-RAM with Self-reference Capability (EE, YZ, WW, RVJ, HL, YC), p. 6.
- DAC-2012-KanjJLHN #estimation #multi
- Yield estimation via multi-cones (RK, RVJ, ZL, JH, SRN), pp. 1107–1112.
- DAC-2006-DadgourJB #architecture #novel #power management
- A novel variation-aware low-power keeper architecture for wide fan-in dynamic gates (HFD, RVJ, KB), pp. 977–982.
- DAC-2006-KanjJN #analysis #design
- Mixture importance sampling and its application to the analysis of SRAM designs in the presence of rare failure events (RK, RVJ, SRN), pp. 69–72.