BibSLEIGH — Sani_R

Travelled to:

11 × USA
4 × France
4 × Germany

Collaborated with:

K.Agarwal F.Liu L.T.Pileggi Y.Cao E.Acar M.B.Tahoori S.S.Sapatnekar H.Su R.Kanj R.V.Joshi S.Kiamehr S.Reda D.Marculescu J.N.Kozhaya ∅ M.Orshansky N.Mehta D.Sylvester H.Qian L.M.Vidigal S.W.Director T.H.Osiecki F.Firouzi Y.Ye J.Hu Y.Liu A.J.Strojwas N.Wehn Z.Li J.Hayes S.Banerjee K.B.Agarwal C.N.Sze A.Ramalingam A.K.Singh D.Z.Pan P.Li X.Li R.Singhal A.Balijepalli A.R.Subramaniam V.Pitchumani N.Rodriguez C.Bittlestone R.Radojcic P.S.Zuchowski C.Moughanni M.Moosa S.D.Posluszny W.Vercruysse D.Blaauw S.B.K.Vrudhula V.Mehrotra S.L.Sam D.S.Boning A.Chandrakasan R.Vallishayee J.Henkel L.Bauer N.Dutt P.Gupta M.Shafique U.Schlichtmann V.Kleeberger J.A.Abraham A.Evans C.Gimmler-Dumont M.Glaß A.Herkersdorf

Talks about:

analysi (9) variat (8) model (7) design (5) interconnect (4) simul (4) parametr (3) network (3) circuit (3) impact (3)

Person: Sani R. Nassif

DBLP: Nassif:Sani_R=

Contributed to:

2014

2013

2012

2010

2009

2008

2007

2006

2005

2004

2003

2002

2000

1986

Wrote 28 papers:

DAC-2014-KiamehrOTN #analysis #approach #fault: Radiation-Induced Soft Error Analysis of SRAMs in SOI FinFET Technology: A Device to Circuit Approach (SK, THO, MBT, SRN), p. 6.
DATE-2014-SchlichtmannKAEGGHNW #abstraction #design: Connecting different worlds — Technology abstraction for reliability-aware design and Test (US, VK, JAA, AE, CGD, MG, AH, SRN, NW), pp. 1–8.
DAC-2013-HenkelBDGNSTW #lessons learnt #reliability #roadmap: Reliable on-chip systems in the nano-era: lessons learnt and future trends (JH, LB, ND, PG, SRN, MS, MBT, NW), p. 10.
DATE-2013-FirouziKTN #analysis #runtime: Incorporating the impacts of workload-dependent runtime variations into timing analysis (FF, SK, MBT, SRN), pp. 1022–1025.
DAC-2012-KanjJLHN #estimation #multi: Yield estimation via multi-cones (RK, RVJ, ZL, JH, SRN), pp. 1107–1112.
DATE-2010-BanerjeeASNO #design: A methodology for propagating design tolerances to shape tolerances for use in manufacturing (SB, KBA, CNS, SRN, MO), pp. 1273–1278.
DATE-2010-NassifMC #roadmap: A resilience roadmap (SRN, NM, YC), pp. 1011–1016.
DATE-2009-RedaN #metric #modelling #novel #parametricity #process: Analyzing the impact of process variations on parametric measurements: Novel models and applications (SR, SRN), pp. 375–380.
DAC-2008-YeLNC #modelling #simulation #statistics: Statistical modeling and simulation of threshold variation under dopant fluctuations and line-edge roughness (YY, FL, SRN, YC), pp. 900–905.
DATE-2008-MarculescuN #architecture #challenge #design #variability: Design Variability: Challenges and Solutions at Microarchitecture-Architecture Level (DM, SRN).
DAC-2007-AgarwalN #process: Characterizing Process Variation in Nanometer CMOS (KA, SRN), pp. 396–399.
DAC-2007-RamalingamSNOP #analysis #composition #modelling #using: Accurate Waveform Modeling using Singular Value Decomposition with Applications to Timing Analysis (AR, AKS, SRN, MO, DZP), pp. 148–153.
DAC-2007-SinghalBSLNC #analysis #modelling #simulation: Modeling and Analysis of Non-Rectangular Gate for Post-Lithography Circuit Simulation (RS, AB, ARS, FL, SRN, YC), pp. 823–828.
DAC-2006-AgarwalN #analysis #statistics: Statistical analysis of SRAM cell stability (KA, SRN), pp. 57–62.
DAC-2006-KanjJN #analysis #design: Mixture importance sampling and its application to the analysis of SRAM designs in the presence of rare failure events (RK, RVJ, SRN), pp. 69–72.
DAC-2006-NassifPRSBR #analysis #question: Variation-aware analysis: savior of the nanometer era? (SRN, VP, NR, DS, CB, RR), pp. 411–412.
DAC-2005-NassifZMMPV #exclamation #what: The Titanic: what went wrong! (SRN, PSZ, CM, MM, SDP, WV), pp. 349–350.
DATE-2005-LiLLPN #modelling #order #parametricity #performance #reduction #using #variability: Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction (PL, FL, XL, LTP, SRN), pp. 958–963.
DAC-2004-AgarwalSBLNV #analysis #metric: Variational delay metrics for interconnect timing analysis (KA, DS, DB, FL, SRN, SBKV), pp. 381–384.
DAC-2003-QianNS #network #random: Random walks in a supply network (HQ, SRN, SSS), pp. 93–98.
DAC-2003-SuAN #algebra #grid #multi #power management #reduction: Power grid reduction based on algebraic multigrid principles (HS, EA, SRN), pp. 109–112.
DAC-2002-SuHSN #network: Congestion-driven codesign of power and signal networks (HS, JH, SSS, SRN), pp. 64–69.
DATE-2002-AcarNP #framework #parametricity #simulation: A Linear-Centric Simulation Framework for Parametric Fluctuations (EA, SRN, LTP), pp. 568–575.
DAC-2000-LiuNPS: Impact of interconnect variations on the clock skew of a gigahertz microprocessor (YL, SRN, LTP, AJS), pp. 168–171.
DAC-2000-MehrotraSBCVN #modelling #performance: A methodology for modeling the effects of systematic within-die interconnect and device variation on circuit performance (VM, SLS, DSB, AC, RV, SRN), pp. 172–175.
DAC-2000-NassifK #grid #performance #power management #simulation: Fast power grid simulation (SRN, JNK), pp. 156–161.
DATE-2000-Nassif #design: Designing Closer to the Edge (SRN), pp. 636–637.
DAC-1986-VidigalND #analysis #integration #named #network: CINNAMON: coupled integration and nodal analysis of MOS networks (LMV, SRN, SWD), pp. 179–185.