Travelled to:1 × USA
Collaborated with:D.Goren M.Zelikson R.Gordin I.A.Wagner A.Barger A.Amir B.Livshitz A.Sherman Y.Tretiakov J.Park D.L.Jordan S.E.Strang R.Singh C.E.Dickey D.L.Harame
Talks about:interconnect (1) methodolog (1) transmiss (1) bandwidth (1) design (1) model (1) devic (1) line (1) high (1) chip (1)
Person: Robert A. Groves
DBLP: Groves:Robert_A=
Contributed to:
2003Wrote 1 papers:
- DAC-2003-GorenZGWBALSTGPJSSDH #design #modelling
- On-chip interconnect-aware design and modeling methodology, based on high bandwidth transmission line devices (DG, MZ, RG, IAW, AB, AA, BL, AS, YT, RAG, JP, DLJ, SES, RS, CED, DLH), pp. 724–727.