Travelled to:1 × France
2 × USA
Collaborated with:D.Goren E.Shamsaev M.Zelikson R.Gordin A.Amir B.Livshitz A.Sherman T.C.Galambos A.Barger Y.Tretiakov R.A.Groves J.Park D.L.Jordan S.E.Strang R.Singh C.E.Dickey D.L.Harame
Talks about:interconnect (2) methodolog (2) transmiss (2) bandwidth (2) design (2) line (2) high (2) chip (2) base (2) awar (2)
Person: Israel A. Wagner
DBLP: Wagner:Israel_A=
Contributed to:
2003
20022001Wrote 3 papers:
- DAC-2003-GorenZGWBALSTGPJSSDH #design #modelling
- On-chip interconnect-aware design and modeling methodology, based on high bandwidth transmission line devices (DG, MZ, RG, IAW, AB, AA, BL, AS, YT, RAG, JP, DLJ, SES, RS, CED, DLH), pp. 724–727.
- DATE-2002-GorenZGGLASW #approach #design
- An Interconnect-Aware Methodology for Analog and Mixed Signal Design, Based on High Bandwidth (Over 40 Ghz) On-Chip Transmission Line Approach (DG, MZ, TCG, RG, BL, AA, AS, IAW), pp. 804–811.
- DAC-2001-GorenSW #analysis #novel #pipes and filters #probability
- A Novel Method for Stochastic Nonlinearity Analysis of a CMOS Pipeline ADC (DG, ES, IAW), pp. 127–132.