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Travelled to:
1 × France
2 × USA
Collaborated with:
J.Henkel M.Shafique H.Khdr J.Chen J.Jahn S.Kobbe
Talks about:
thermal (2) silicon (2) dark (2) temperatur (1) transient (1) constrain (1) workload (1) configur (1) softwar (1) resourc (1)

Person: Santiago Pagani

DBLP DBLP: Pagani:Santiago

Contributed to:

DAC 20152015
DATE 20152015
DAC 20132013

Wrote 4 papers:

DAC-2015-HenkelKPS #roadmap
New trends in dark silicon (JH, HK, SP, MS), p. 6.
DAC-2015-KhdrPSH #resource management
Thermal constrained resource management for mixed ILP-TLP workloads in dark silicon chips (HK, SP, MS, JH), p. 6.
DATE-2015-PaganiCSH #modelling #named #performance
MatEx: efficient transient and peak temperature computation for compact thermal models (SP, JJC, MS, JH), pp. 1515–1520.
DAC-2013-JahnPKCH #configuration management #optimisation #pipes and filters
Optimizations for configuring and mapping software pipelines in many core systems (JJ, SP, SK, JJC, JH), p. 8.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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