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Travelled to:
1 × France
1 × Germany
1 × USA
Collaborated with:
R.Velagapudi E.Kougianos S.K.Mandal P.Bhojwani R.N.Mahapatra J.Singh D.K.Pradhan S.Hollis J.Mathew
Talks about:
nanoscal (1) datapath (1) smarter (1) circuit (1) batteri (1) toward (1) system (1) physic (1) leakag (1) design (1)

Person: Saraju P. Mohanty

DBLP DBLP: Mohanty:Saraju_P=

Contributed to:

DATE 20092009
DAC 20082008
DATE 20062006

Wrote 3 papers:

DATE-2009-SinghPHMM #embedded #power management
Single ended 6T SRAM with isolated read-port for low-power embedded systems (JS, DKP, SH, SPM, JM), pp. 917–922.
DAC-2008-MandalBMM #design #named #towards
IntellBatt: towards smarter battery design (SKM, PB, SPM, RNM), pp. 872–877.
DATE-2006-MohantyVK #optimisation
Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits (SPM, RV, EK), pp. 1191–1196.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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