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Travelled to:
1 × Germany
3 × USA
Collaborated with:
K.Roy B.C.Paul F.Dartu D.Somasekhar Y.Ye V.De
Talks about:
nois (3) circuit (2) technolog (1) crosstalk (1) algorithm (1) precharg (1) process (1) pattern (1) nanomet (1) generat (1)

Person: Seung Hoon Choi

DBLP DBLP: Choi:Seung_Hoon

Contributed to:

DAC 20042004
DATE 20032003
DAC 20022002
DAC 20002000

Wrote 4 papers:

DAC-2004-ChoiPR #algorithm #novel #process
Novel sizing algorithm for yield improvement under process variation in nanometer technology (SHC, BCP, KR), pp. 454–459.
DATE-2003-ChoiR #logic
A New Crosstalk Noise Model for DOMINO Logic Circuits (SHC, KR), pp. 11112–11113.
DAC-2002-ChoiRD #generative
Timed pattern generation for noise-on-delay calculation (SHC, KR, FD), pp. 870–873.
DAC-2000-SomasekharCRYD #analysis
Dynamic noise analysis in precharge-evaluate circuits (DS, SHC, KR, YY, VD), p. 243.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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