Travelled to:5 × USA
Collaborated with:K.Roy V.De L.Wei D.Somasekhar S.H.Choi Z.Chen T.Karnik J.Tschanz S.M.Burns V.Govindarajulu S.Borkar A.Vassighi A.Keshavarzi S.Narendra G.Schrom S.Lee G.Chrysler M.Sachdev
Talks about:microprocessor (2) circuit (2) design (2) power (2) optim (2) low (2) temperatur (1) methodolog (1) algorithm (1) synthesi (1)
Person: Yibin Ye
DBLP: Ye:Yibin
Contributed to:
20042002200019991997Wrote 5 papers:
- DAC-2004-VassighiKNSYLCSD #design #optimisation
- Design optimizations for microprocessors at low temperature (AV, AK, SN, GS, YY, SL, GC, MS, VD), pp. 2–5.
- DAC-2002-KarnikYTWBGDB #optimisation #performance
- Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors (TK, YY, JT, LW, SMB, VG, VD, SB), pp. 486–491.
- DAC-2000-SomasekharCRYD #analysis
- Dynamic noise analysis in precharge-evaluate circuits (DS, SHC, KR, YY, VD), p. 243.
- DAC-1999-WeiCRYD #design #power management
- Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications (LW, ZC, KR, YY, VD), pp. 430–435.
- DAC-1997-YeR #algorithm #graph #network #synthesis
- A Graph-Based Synthesis Algorithm for AND/XOR Networks (YY, KR), pp. 107–112.