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Travelled to:
1 × France
1 × USA
2 × Germany
Collaborated with:
H.Fujiwara H.Iwata M.Imanishi K.Masuda
Talks about:
wrapper (2) schedul (2) test (2) interconnect (1) reconfigur (1) constrain (1) algorithm (1) transfer (1) interact (1) function (1)

Person: Tomokazu Yoneda

DBLP DBLP: Yoneda:Tomokazu

Contributed to:

DATE 20082008
DAC 20072007
DATE 20072007
DATE 20062006

Wrote 4 papers:

DATE-2008-YonedaF #functional #reuse
Wrapper and TAM Co-Optimization for Reuse of SoC Functional Interconnects (TY, HF), pp. 1366–1369.
DAC-2007-IwataYF
A DFT Method for Time Expansion Model at Register Transfer Level (HI, TY, HF), pp. 682–687.
DATE-2007-YonedaIF #algorithm #configuration management #interactive #scheduling #using
Interactive presentation: An SoC test scheduling algorithm using reconfigurable union wrappers (TY, MI, HF), pp. 231–236.
DATE-2006-YonedaMF #multi #scheduling
Power-constrained test scheduling for multi-clock domain SoCs (TY, KM, HF), pp. 297–302.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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