Travelled to:1 × France
1 × USA
Collaborated with:X.Wang J.Xu W.Zhang X.Wu M.Nikdast Z.Wang Z.Wang Y.Xie Q.Li W.Liu
Talks about:power (2) nois (2) chip (2) crosstalk (1) parasit (1) network (1) capacit (1) analysi (1) memori (1) ground (1)
Person: Yaoyao Ye
DBLP: Ye:Yaoyao
Contributed to:
2013
2010Wrote 2 papers:
- DATE-2013-WangXZWYWNW #using
- Active power-gating-induced power/ground noise alleviation using parasitic capacitance of on-chip memories (XW, JX, WZ, XW, YY, ZW, MN, ZW), pp. 1221–1224.
- DAC-2010-XieNXZLWYWL #analysis #fault
- Crosstalk noise and bit error rate analysis for optical network-on-chip (YX, MN, JX, WZ, QL, XW, YY, XW, WL), pp. 657–660.