Travelled to:
1 × China
1 × Germany
1 × USA
2 × France
Collaborated with:
J.Xu X.Wu H.Shu Z.Wang Z.Wang W.Zhang Y.Ye M.Nikdast K.J.Chen Y.Xie Q.Li W.Liu P.Yang L.H.K.Duong H.Li R.K.V.Maeda Z.Wang
Talks about:
power (5) nois (3) chip (3) system (2) ground (2) induc (2) gate (2) recommend (1) processor (1) postgradu (1)
Person: Xuan Wang
DBLP: Wang:Xuan
Contributed to:
Wrote 5 papers:
- DATE-2015-WangWXWWYDLMW #adaptation #process
- Adaptively tolerate power-gating-induced power/ground noise under process variations (ZW, XW, JX, XW, ZW, PY, LHKD, HL, RKVM, ZW), pp. 483–488.
- DATE-2014-WangXWCWW #manycore #power management
- Characterizing power delivery systems with on/off-chip voltage regulators for many-core processors (XW, JX, ZW, KJC, XW, ZW), pp. 1–4.
- DATE-2013-WangXZWYWNW #using
- Active power-gating-induced power/ground noise alleviation using parasitic capacitance of on-chip memories (XW, JX, WZ, XW, YY, ZW, MN, ZW), pp. 1221–1224.
- ICEIS-v2-2011-WangS #education #information management #recommendation
- Application of Recommender Engine in Academic Degree and Postgraduate Education Knowledge Management System (XW, HS), pp. 455–458.
- DAC-2010-XieNXZLWYWL #analysis #fault
- Crosstalk noise and bit error rate analysis for optical network-on-chip (YX, MN, JX, WZ, QL, XW, YY, XW, WL), pp. 657–660.