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Travelled to:
1 × France
2 × Germany
Collaborated with:
K.Choi J.Kong S.Eo C.Shin E.Chung J.Um W.Kwon S.Hong T.Kim T.Kim Y.Kim
Talks about:
bus (3) architectur (2) design (2) model (2) fast (2) subsystem (1) parameter (1) transact (1) systemat (1) platform (1)

Person: Young-Taek Kim

DBLP DBLP: Kim:Young=Taek

Contributed to:

DATE 20062006
DATE 20052005
DATE v1 20042004

Wrote 3 papers:

DATE-2006-UmKHKCKEK #design #modelling #platform
A systematic IP and bus subsystem modeling for platform-based system design (JU, WCK, SH, YTK, KMC, JTK, SKE, TK), pp. 560–564.
DATE-2005-KimKKSCCKE #architecture #modelling #performance #transaction
Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture (YTK, TK, YK, CS, EYC, KMC, JTK, SKE), pp. 138–139.
DATE-v1-2004-ShinKCCKE #architecture #design #performance
Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design (CS, YTK, EYC, KMC, JTK, SKE), pp. 352–357.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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