Travelled to:2 × France
3 × Germany
Collaborated with:G.D.Micheli L.Benini M.Jun S.Yoon Y.Kim C.Shin K.Choi J.Kong S.Eo A.Bogliolo Y.Lu T.Simunic T.Kim Y.Kim
Talks about:architectur (2) power (2) manag (2) fast (2) bus (2) interconnect (1) stationari (1) comparison (1) parameter (1) algorithm (1)
Person: Eui-Young Chung
DBLP: Chung:Eui=Young
Contributed to:
20102005200420001999Wrote 5 papers:
- DATE-2010-JunYC #library #multi #network #synthesis
- Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network (MJ, SY, EYC), pp. 1390–1395.
- DATE-2005-KimKKSCCKE #architecture #modelling #performance #transaction
- Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture (YTK, TK, YK, CS, EYC, KMC, JTK, SKE), pp. 138–139.
- DATE-v1-2004-ShinKCCKE #architecture #design #performance
- Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design (CS, YTK, EYC, KMC, JTK, SKE), pp. 352–357.
- DATE-2000-LuCSMB #algorithm #comparison #power management
- Quantitative Comparison of Power Management Algorithms (YHL, EYC, TS, GDM, LB), pp. 20–26.
- DATE-1999-ChungBBM #power management
- Dynamic Power Management for non-stationary service requests (EYC, LB, AB, GDM), pp. 77–81.