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Travelled to:
1 × Germany
2 × USA
Collaborated with:
R.P.Dick C.Zhu L.Shang J.Wang H.Zhou R.G.Knobel Y.Yang
Talks about:
design (2) architectur (1) transistor (1) increment (1) synthesi (1) electron (1) behavior (1) thermal (1) analysi (1) tunnel (1)

Person: Zhenyu (Peter) Gu

DBLP DBLP: Gu:Zhenyu_(Peter)

Contributed to:

DAC 20072007
DATE 20062006
DAC 20052005

Wrote 3 papers:

DAC-2007-ZhuGSDK #architecture #power management #towards #using
Towards An Ultra-Low-Power Architecture Using Single-Electron Tunneling Transistors (CZ, Z(G, LS, RPD, RGK), pp. 312–317.
DATE-2006-YangGZSD #adaptation #analysis #design #synthesis
Adaptive chip-package thermal analysis for synthesis and design (YY, Z(G, CZ, LS, RPD), pp. 844–849.
DAC-2005-GuWDZ #behaviour #design #incremental #physics
Incremental exploration of the combined physical and behavioral design space (Z(G, JW, RPD, HZ), pp. 208–213.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.