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design (7)
process (7)
system (6)
base (5)
model (5)

Stem metal$ (all stems)

37 papers:

CASECASE-2015-ReisgenLMBW #modelling #process #quality
Process control of gas metal arc welding processes by optical weld pool observation with combined quality models (UR, PL, SM, GB, KW), pp. 407–410.
CASECASE-2015-YeCC #bibliography #energy #modelling #simulation
Metal-based addictive manufacturing: A literature review on modeling, simulation and energy consumption (QY, SC, QC), pp. 218–224.
DACDAC-2015-ChenSC #flexibility
A SPICE model of flexible transition metal dichalcogenide field-effect transistors (YYC, ZS, DC), p. 6.
DACDAC-2015-DingCM #self
Detailed routing for spacer-is-metal type self-aligned double/quadruple patterning lithography (YD, CCNC, WKM), p. 6.
DACDAC-2015-RakshitWLGM #design #power management #robust
Monolayer transition metal dichalcogenide and black phosphorus transistors for low power robust SRAM design (JR, RW, KTL, JG, KM), p. 6.
DACDAC-2015-XieLXCJJ
Jump test for metallic CNTs in CNFET-based SRAM (FX, XL, QX, KC, NJ, LJ), p. 6.
SIGMODSIGMOD-2015-Patel
From Data to Insights @ Bare Metal Speed (JMP), p. 1.
ASPLOSASPLOS-2015-OmoteSK
Improving Agility and Elasticity in Bare-metal Clouds (YO, TS, KK), pp. 145–159.
DACDAC-2014-ChangJC #configuration management #functional #using
Functional ECO Using Metal-Configurable Gate-Array Spare Cells (HYC, IHRJ, YWC), p. 6.
DATEDATE-2014-LiuCW
Metal layer planning for silicon interposers with consideration of routability and manufacturing cost (WHL, TKC, TCW), pp. 1–6.
DATEDATE-2014-SunMSPL #design #power management #robust
A low power and robust carbon nanotube 6T SRAM design with metallic tolerance (LS, JM, RAS, DKP, ZL), pp. 1–4.
DACDAC-2012-ChangJC #configuration management #optimisation #using
Timing ECO optimization using metal-configurable gate-array spare cells (HYC, IHRJ, YWC), pp. 802–807.
ASPLOSASPLOS-2012-GordonAHBLST #eli #named #performance
ELI: bare-metal performance for I/O virtualization (AG, NA, NH, MBY, AL, AS, DT), pp. 411–422.
CASECASE-2011-Soressi #industrial #safety
Introduction of safety rule IEC EN62061 in Metal Industry (ES), pp. 195–200.
CASECASE-2011-UrliM #industrial #realtime
Use of Ethernet communications for real-time control systems in the metals industry (LU, SM), pp. 6–11.
ICDARICDAR-2011-KonyaES #using
Character Enhancement for Historical Newspapers Printed Using Hot Metal Typesetting (IVK, SE, CS), pp. 936–940.
CASECASE-2010-SaundersJMOM #automation #design #modelling #process
Model-based design automation and process automation in titanium sheet metal manufacturing (GS, MKJ, JM, CO, MM), pp. 873–878.
CASECASE-2008-SandouWON
Receding horizon climate control in metal mine extraction rooms (GS, EW, SO, SIN), pp. 839–844.
DATEDATE-2008-ZhangPM #design #guidelines #logic
Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits (JZ, NP, SM), pp. 1009–1014.
ICPRICPR-2008-TominagaY #classification
Metal-dielectric object classification by polarization degree map (ST, TY), pp. 1–4.
ECOOPECOOP-2008-HuangHBR #bound #hardware #object-oriented #programming
Liquid Metal: Object-Oriented Programming Across the Hardware/Software Boundary (SSH, AH, DFB, RMR), pp. 76–103.
CASECASE-2007-PlanckaertDBBR #algorithm
Metal transfer characterization with an active contour algorithm in MIG/MAG welding movies (JPP, EHD, DB, FB, FR), pp. 933–938.
DATEDATE-2007-HashempourL #detection #fault #modelling
Circuit-level modeling and detection of metallic carbon nanotube defects in carbon nanotube FETs (HH, FL), pp. 841–846.
SPLCSPLC-2007-SellierEU #enterprise #product line
Introducing Software Product Line Engineering for Metal Processing Lines in a Small to Medium Enterprise (DS, GBE, GU), pp. 54–62.
ICPRICPR-v1-2006-GayuboGFMP #detection #fault #online #process
On-line machine vision system for detect split defects in sheet-metal forming processes (FG, JLG, EdlFL, FMT, JRP), pp. 723–726.
CASECASE-2005-NgYHD #energy #process
Diagnosis of sheet metal stamping processes based on thermal energy distribution (YMHN, MY, YH, RD), pp. 191–196.
DATEDATE-2002-JerkeL #analysis #verification
Hierarchical Current Density Verification for Electromigration Analysis in Arbitrary Shaped Metallization Patterns of Analog Circuits (GJ, JL), pp. 464–469.
PASTEPASTE-2002-ChelfEH #how #static analysis
How to write system-specific, static checkers in metal (BC, DRE, SH), pp. 51–60.
DACDAC-1991-HwangHLH #automation #generative #layout #performance
An Efficient Layout Style for 2-Metal CMOS Leaf Cells And Their Automatic Generation (CYH, YCH, YLL, YCH), pp. 481–486.
DACDAC-1986-PutatundaSMC #compilation #named
HAPPI: a chip compiler based on double-level-metal technology (RP, DS, SM, JC), pp. 736–743.
DACDAC-1985-HsuTCPT #layout #named #standard
ALPS2: a standard cell layout system for double-layer metal technology (CPH, BNT, KC, RAP, JT), pp. 443–448.
DACDAC-1983-DalCero #automation #multi
Automatic batch processing in multilayer ceramic metallization (ND), pp. 682–685.
DACDAC-1983-Robinson #array #automation #layout
Automatic layout for gate arrays with one layer of metal (PR0), pp. 658–664.
DACDAC-1980-Currier #automation #design
Automation of sheet metal design and manufacturing (DWC), pp. 134–138.
DACDAC-1980-GouldE #array #design #standard
The standard transistor array (STAR): Part I A two-layer metal semicustom design system (JMG, TME), pp. 108–113.
DACDAC-1976-Hightower #interactive #named
SLEUTH — a metal-to-metal audit program in an interactive environment (DWH), pp. 318–326.
DACDAC-1969-Samek #automation #design
The autopunch system or design automation comes to the sheet metal shop (WJS), pp. 71–90.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.