20 papers:
ICSE-v1-2015-MullerF #developer- Stuck and Frustrated or in Flow and Happy: Sensing Developers’ Emotions and Progress (SCM, TF), pp. 688–699.
DATE-2009-Schat #fault #on the- On the relationship between stuck-at fault coverage and transition fault coverage (JS), pp. 1218–1221.
IFM-2009-HasanAT #analysis #array #configuration management #fault #memory management #probability- Formal Probabilistic Analysis of Stuck-at Faults in Reconfigurable Memory Arrays (OH, NA, ST), pp. 277–291.
CAV-2004-FournetHRR #consistency- Stuck-Free Conformance (CF, CARH, SKR, JR), pp. 242–254.
- DATE-2003-IchiharaI #fault #generative #testing
- Test Generation for Acyclic Sequential Circuits with Single Stuck-at Fault Combinational ATPG (HI, TI), pp. 11180–11181.
- DATE-2003-OhtakeOF #algorithm #fault #generative #testing #using
- A Method of Test Generation fo Path Delay Faults Using Stuck-at Fault Test Generation Algorithms (SO, KO, HF), pp. 10310–10315.
LCTES-OM-2001-Yellin #challenge #middleware #optimisation #roadmap- Stuck in the Middle: Challenges and Trends in Optimizing Middleware (DMY), pp. 175–180.
DAC-1995-VenkataramanHFRCP #agile #fault #simulation #using- Rapid Diagnostic Fault Simulation of Stuck-at Faults in Sequential Circuits Using Compact Lists (SV, IH, WKF, EMR, SC, JHP), pp. 133–138.
- EDAC-1994-ChenG #generative #testing
- BIST Test Pattern Generators for Stuck-Open and Delay Testing (CAC, SKG), pp. 289–296.
- DAC-1993-KajiharaPKR #effectiveness #fault #generative #logic #testing
- Cost-Effective Generation of Minimal Test Sets for Stuck-at Faults in Combinational Logic Circuits (SK, IP, KK, SMR), pp. 102–106.
- DAC-1992-SaldanhaBS #equivalence #generative #robust #testing
- Equivalence of Robust Delay-Fault and Single Stuck-Fault Test Generation (AS, RKB, ALSV), pp. 173–176.
- DAC-1990-Chakravarty #identification #on the
- On Synthesizing and Identifying Stuck-Open Testable CMOS Combinational Circuits (extended abstract) (SC), pp. 736–739.
- DAC-1990-LeeH #automation #fault #generative #named #performance
- SOPRANO: An Efficient Automatic Test Pattern Generator for Stuck-Open Faults in CMOS Combinational Circuits (HKL, DSH), pp. 660–666.
- DAC-1989-LeeHK #fault #generative #testing #using
- Test Generation of Stuck-open Faults Using Stuck-at Test Sets in CMOS Combinational Circuits (HKL, DSH, KK), pp. 345–350.
- DAC-1989-RajsumanJM #detection #fault #using
- CMOS Stuck-open Fault Detection Using Single Test Patterns (RR, APJ, YKM), pp. 714–717.
- DAC-1989-WangKL #approach #fault #logic #robust #set
- A New Approach to Derive Robust Sets for Stuck-open Faults in CMOS Combinational Logic Circuits (JFW, TYK, JYL), pp. 726–729.
- DAC-1987-Koeppe #fault #layout
- Optimal Layout to Avoid CMOS Stuck-Open Faults (SK), pp. 829–835.
- DAC-1986-WeiweiX #algorithm #fault #generative #robust #testing
- Robust test generation algorithm for stuck-open fault in CMOS circuits (WM, XL), pp. 236–242.
- DAC-1981-El-Ziq #automation #fault #generative #testing
- Automatic test generation for stuck-open faults in CMOS VLSI (YMEZ), pp. 347–354.
- DAC-1980-KarpovskyS #component #detection #fault #standard
- Detecting bridging and stuck-at faults at input and output pins of standard digital components (MGK, SYHS), pp. 494–505.
