Fast, Layout-Inclusive Analog Circuit Synthesis using Pre-Compiled Parasitic-Aware Symbolic Performance Models
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Mukesh Ranjan, Wim Verhaegen, Anuradha Agarwal, Hemanth Sampath, Ranga Vemuri, Georges G. E. Gielen
Fast, Layout-Inclusive Analog Circuit Synthesis using Pre-Compiled Parasitic-Aware Symbolic Performance Models
DATE, 2004.

DATE v1 2004
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@inproceedings{DATE-v1-2004-RanjanVASVG,
	author        = "Mukesh Ranjan and Wim Verhaegen and Anuradha Agarwal and Hemanth Sampath and Ranga Vemuri and Georges G. E. Gielen",
	booktitle     = "{Proceedings of the Eighth Conference on Design, Automation and Test in Europe, Volume 1}",
	doi           = "10.1109/DATE.2004.1268911",
	isbn          = "0-7695-2085-5",
	pages         = "604--609",
	publisher     = "{IEEE Computer Society}",
	title         = "{Fast, Layout-Inclusive Analog Circuit Synthesis using Pre-Compiled Parasitic-Aware Symbolic Performance Models}",
	year          = 2004,
}

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