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Travelled to:
1 × Germany
2 × France
5 × USA
Collaborated with:
M.Li L.Xie T.Wu J.T.Linderoth E.Tashjian A.Srivastava H.Shojaei P.Ramanathan M.Tehranipoor J.T.Linderoth K.K.Saluja
Talks about:
silicon (4) global (4) rout (4) post (4) program (3) integ (3) approach (2) variabl (2) variat (2) signal (2)

Person: Azadeh Davoodi

DBLP DBLP: Davoodi:Azadeh

Contributed to:

DAC 20152015
DATE 20132013
DAC 20122012
DATE 20122012
DATE 20112011
DAC 20102010
DAC 20092009
DAC 20062006

Wrote 11 papers:

DAC-2015-TashjianD #identification #on the #using
On using control signals for word-level identification in a gate-level netlist (ET, AD), p. 6.
DATE-2013-LiD #approach #debugging #hybrid #performance
A hybrid approach for fast and accurate trace signal selection for post-silicon debug (ML, AD), pp. 485–490.
DAC-2012-ShojaeiDR #integer #programming
Confidentiality preserving integer programming for global routing (HS, AD, PR), pp. 709–716.
DATE-2012-LiDT #authentication #detection #framework #hardware #self
A sensor-assisted self-authentication framework for hardware trojan detection (ML, AD, MT), pp. 1331–1336.
DATE-2012-LiDX #process
Custom on-chip sensors for post-silicon failing path isolation in the presence of process variations (ML, AD, LX), pp. 1591–1596.
DATE-2011-WuDL #multi
Power-driven global routing for multi-supply voltage domains (THW, AD, JTL), pp. 443–448.
DAC-2010-WuDL #approach #integer #parallel #programming
A parallel integer programming approach to global routing (THW, AD, JTL), pp. 194–199.
DAC-2010-XieD #predict #variability
Representative path selection for post-silicon timing prediction under variability (LX, AD), pp. 386–391.
DAC-2010-XieDS
Post-silicon diagnosis of segments of failing speedpaths due to manufacturing variations (LX, AD, KKS), pp. 274–279.
DAC-2009-WuDL #3d #integer #named #programming #scalability #using
GRIP: scalable 3D global routing using integer programming (THW, AD, JTL), pp. 320–325.
DAC-2006-DavoodiS #optimisation #variability
Variability driven gate sizing for binning yield optimization (AD, AS), pp. 959–964.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.