Travelled to:2 × Germany
3 × France
3 × USA
Collaborated with:∅ A.Orailoglu R.Tessier S.Verma K.Ramineni M.W.Heath W.P.Burleson Z.Zeng Q.Zhang M.J.Ciesielski
Talks about:test (4) interact (2) coverag (2) concurr (2) design (2) microarchitectur (1) interconnect (1) nondetermin (1) architectur (1) asynchron (1)
Person: Ian G. Harris
DBLP: Harris:Ian_G=
Contributed to:
2012
2007200620042003200019941994Wrote 8 papers:
- DAC-2012-Harris #design #natural language #specification
- Extracting design information from natural language specifications (IGH), pp. 1256–1257.
- DATE-2007-VermaHR #automation #behaviour #functional #generative #interactive #modelling
- Interactive presentation: Automatic generation of functional coverage models from behavioral verilog descriptions (SV, IGH, KR), pp. 900–905.
- DATE-2006-Harris #metric #process #validation
- A coverage metric for the validation of interacting processes (IGH), pp. 1019–1024.
- DATE-v1-2004-HeathBH #named #nondeterminism
- Synchro-Tokens: Eliminating Nondeterminism to Enable Chip-Level Test of Globally-Asynchronous Locally-Synchronous SoC?s (MWH, WPB, IGH), pp. 410–415.
- DATE-2003-ZengZHC #correlation #performance #using
- Fast Computation of Data Correlation Using BDDs (ZZ, QZ, IGH, MJC), pp. 10122–10129.
- DAC-2000-HarrisT #architecture #clustering #testing
- Interconnect testing in cluster-based FPGA architectures (IGH, RT), pp. 49–54.
- DAC-1994-HarrisO #architecture #concurrent #design #synthesis
- Microarchitectural Synthesis of VLSI Designs with High Test Concurrency (IGH, AO), pp. 206–211.
- EDAC-1994-HarrisO #concurrent #fine-grained #scheduling
- Fine-Grained Concurrency in Test Scheduling for Partial-Intrusion BIST (IGH, AO), pp. 119–123.