BibSLEIGH corpus
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Open Knowledge
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Travelled to:
1 × China
1 × France
1 × Mexico
7 × USA
Collaborated with:
W.A.Wulf M.Schulz B.R.d.Supinski J.B.Carter T.Mu J.Tao B.K.Mathew A.Davis G.Bronevetsky D.Marques K.Pingali R.Rugina E.Ipek R.Caruana Z.Fang L.Zhang W.C.Hsieh B.C.Lee D.M.Brooks K.Singh J.Marathe F.Müller T.Mohan A.Yoo S.I.Hong M.H.Salinas R.H.Klenke J.H.Aylor A.Bardizbanyan P.Gavin D.B.Whalley M.Själander P.Larsson-Edefors P.Stenström
Talks about:
access (5) memori (4) architectur (2) parallel (2) effici (2) design (2) applic (2) order (2) model (2) checkpoint (1)

Person: Sally A. McKee

DBLP DBLP: McKee:Sally_A=

Contributed to:

CGO 20132013
PPoPP 20082008
PPoPP 20072007
ASPLOS 20062006
CGO 20032003
SOFTVIS 20032003
HPCA 20012001
HPCA 20002000
HPCA 19991999
HPCA 19951995

Wrote 10 papers:

CGO-2013-BardizbanyanGWSLMS #data access #performance #using
Improving data access efficiency by using a tagless access buffer (TAB) (AB, PG, DBW, MS, PLE, SAM, PS), p. 11.
PPoPP-2008-BronevetskyMPRM #incremental
Compiler-enhanced incremental checkpointing for OpenMP applications (GB, DM, KP, RR, SAM), pp. 275–276.
PPoPP-2007-LeeBSSSM #learning #modelling #parallel #performance
Methods of inference and learning for performance modeling of parallel applications (BCL, DMB, BRdS, MS, KS, SAM), pp. 249–258.
ASPLOS-2006-IpekMCSS #architecture #design #modelling #predict
Efficiently exploring architectural design spaces via predictive modeling (EI, SAM, RC, BRdS, MS), pp. 195–206.
CGO-2003-MaratheMMSMY #memory management #metric #named
METRIC: Tracking Down Inefficiencies in the Memory Hierarchy via Binary Rewriting (JM, FM, TM, BRdS, SAM, AY), pp. 289–300.
SOFTVIS-2003-MuTSM #architecture #interactive #locality #optimisation
Interactive Locality Optimization on NUMA Architectures (TM, JT, MS, SAM), pp. 133–141.
HPCA-2001-FangZCHM #hardware #online
Reevaluating Online Superpage Promotion with Hardware Support (ZF, LZ, JBC, WCH, SAM), pp. 63–72.
HPCA-2000-MathewMCD #design #memory management #parallel
Design of a Parallel Vector Access Unit for SDRAM Memory Systems (BKM, SAM, JBC, AD), pp. 39–48.
HPCA-1999-HongMSKAW #effectiveness #memory management #order
Access Order and Effective Bandwidth for Streams on a Direct Rambus Memory (SIH, SAM, MHS, RHK, JHA, WAW), pp. 80–89.
Access Ordering and Memory-Conscious Cache Utilization (SAM, WAW), pp. 253–262.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.