2 × France
3 × USA
W.Liu Y.Lin C.Wu H.Su C.Hsu C.Koh W.Kao K.Chao S.Popovych H.Lai C.Wang T.Wang Y.Wei C.C.N.Sze C.J.Alpert Z.Li N.Viswanathan
rout (4) awar (3) placement (2) detail (2) sub (2) lithographi (1) constraint (1) recognit (1) gridless (1) conflict (1)
Person: Yih-Lang Li
Wrote 7 papers:
- DATE-2015-SuHL #encoding #named #recognition #scalability
- SubHunter: a high-performance and scalable sub-circuit recognition method with Prüfer-encoding (HYS, CHH, YLL), pp. 1583–1586.
- Density-aware Detailed Placement with Instant Legalization (SP, HHL, CMW, YLL, WHL, TCW), p. 6.
- DAC-2013-LiuKL #optimisation
- Optimization of placement solutions for routability (WHL, CKK, YLL), p. 9.
- DAC-2013-LiuWSALLV #constraints #design #estimation
- Routing congestion estimation with real design constraints (WHL, YW, CCNS, CJA, ZL, YLL, NV), p. 8.
- DAC-2010-LinL #graph
- Double patterning lithography aware gridless detailed routing with innovative conflict graph (YHL, YLL), pp. 398–403.
- DAC-2010-LiuKLC #bound #concurrent #multi #thread
- Multi-threaded collision-aware global routing with bounded-length maze routing (WHL, WCK, YLL, KYC), pp. 200–205.
- EDAC-1994-LiW #automaton #fault #logic #simulation
- Logic and Fault Simulation by Cellular Automata (YLL, CWW), pp. 552–556.