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75 papers:

DACDAC-2015-DingCM #self
Detailed routing for spacer-is-metal type self-aligned double/quadruple patterning lithography (YD, CCNC, WKM), p. 6.
DACDAC-2015-HanKL #design #evaluation #using
Evaluation of BEOL design rule impacts using an optimal ILP-based detailed router (KH, ABK, HL), p. 6.
DATEDATE-2015-LiuLY #approach #effectiveness
An effective triple patterning aware grid-based detailed routing approach (ZL, CL, EFYY), pp. 1641–1646.
ITiCSEITiCSE-2015-TollOEW #programming #student
Detailed Recordings of Student Programming Sessions (DT, TO, ME, AW), p. 328.
CHICHI-2015-RaganGT #how #memory management #process #visual notation
Evaluating How Level of Detail of Visual History Affects Process Memory (EDR, JRG, AT), pp. 2711–2720.
DACDAC-2014-LinHL
Parasitic-aware Sizing and Detailed Routing for Binary-weighted Capacitors in Charge-scaling DAC (MPHL, VWHH, CYL), p. 6.
DACDAC-2014-LiuFC #process #self #using
Overlay-Aware Detailed Routing for Self-Aligned Double Patterning Lithography Using the Cut Process (IJL, SYF, YWC), p. 6.
DACDAC-2014-PopovychLWLLW
Density-aware Detailed Placement with Instant Legalization (SP, HHL, CMW, YLL, WHL, TCW), p. 6.
DATEDATE-2014-DuW #optimisation #process #standard
Optimization of standard cell based detailed placement for 16 nm FinFET process (YD, MDFW), pp. 1–6.
ICMLICML-c1-2014-Sohl-DicksteinMD #monte carlo
Hamiltonian Monte Carlo Without Detailed Balance (JSD, MM, MRD), pp. 719–726.
HPCAHPCA-2014-NugterenBCB #distance #gpu #modelling #reuse
A detailed GPU cache model based on reuse distance theory (CN, GJvdB, HC, HEB), pp. 37–48.
CAVCAV-2014-RakamaricE #implementation #named #verification
SMACK: Decoupling Source Language Details from Verifier Implementations (ZR, ME), pp. 106–113.
CASECASE-2013-PerinF #automation #modelling
Comparing detailed and abstract timed models of automated discrete manufacturing systems (MP, JMF), pp. 916–923.
DACDAC-2013-Du0SSLMW #self
Spacer-is-dielectric-compliant detailed routing for self-aligned double patterning lithography (YD, QM, HS, JS, GLP, AM, MDFW), p. 6.
DATEDATE-2013-ShahKA #analysis #bound
Bounding SDRAM interference: detailed analysis vs. latency-rate analysis (HS, AK, BA), pp. 308–313.
CHICHI-2013-IonCHHS #multi #named #scalability
Canyon: providing location awareness of multiple moving objects in a detail view on large displays (AI, YLBC, MH, MSH, SDS), pp. 3149–3158.
ICSTSAT-2013-MihalT #approach #constraints #logic #programmable
A Constraint Satisfaction Approach for Programmable Logic Detailed Placement (AM, ST), pp. 208–223.
DACDAC-2012-ZhangC #named
GDRouter: interleaved global routing and detailed routing for ultimate routability (YZ, CC), pp. 597–602.
DATEDATE-2012-AbedW #online
Double-patterning friendly grid-based detailed routing with online conflict resolution (ISA, AGW), pp. 1475–1478.
DACDAC-2011-DingGYP #detection #learning #named
AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection (DD, JRG, KY, DZP), pp. 795–800.
DACDAC-2011-Nieberg
Gridless pin access in detailed routing (TN), pp. 170–175.
ICDARICDAR-2011-NagySJEMK #web
Data Extraction from Web Tables: The Devil is in the Details (GN, SCS, DJ, DWE, SM, MSK), pp. 242–246.
CHICHI-2011-JakobsenH #bibliography #interface #visualisation
Sizing up visualizations: effects of display size in focus+context, overview+detail, and zooming interfaces (MRJ, KH), pp. 1451–1460.
HPCAHPCA-2011-PellauerAKPE #manycore #named #simulation #using
HAsim: FPGA-based high-detail multicore simulation using time-division multiplexing (MP, MA, MAK, AP, JSE), pp. 406–417.
CASECASE-2010-VergnanoTLFPYBL #energy #optimisation #scheduling
Embedding detailed robot energy optimization into high-level scheduling (AV, CT, BL, PF, MP, CY, SB, FL), pp. 386–392.
DACDAC-2010-LinL #graph
Double patterning lithography aware gridless detailed routing with innovative conflict graph (YHL, YLL), pp. 398–403.
DATEDATE-2010-GaoM #lazy evaluation
Enhancing double-patterning detailed routing with lazy coloring and within-path conflict avoidance (XG, LM), pp. 1279–1284.
DATEDATE-2010-MohanGS #memory management #named
FlashPower: A detailed power model for NAND flash memory (VM, SG, MRS), pp. 502–507.
ICPRICPR-2010-VesBRAS #modelling #retrieval
Wavelet-Based Texture Retrieval Modeling the Magnitudes of Wavelet Detail Coefficients with a Generalized Gamma Distribution (EdV, XB, AMCR, DGA, LS), pp. 221–224.
FSEFSE-2010-Sanbonmatsu #biology #comprehension #towards
Supercomputing in biology: towards understanding living systems in atomic detail (KYS), pp. 1–2.
LCTESLCTES-2010-ForoozannejadHHG #analysis #streaming
Look into details: the benefits of fine-grain streaming buffer analysis (MHF, MH, TLH, SG), pp. 27–36.
DACDAC-2009-DengCS #authentication #hardware #performance #simulation
Hardware authentication leveraging performance limits in detailed simulations and emulations (DYD, AHC, GES), pp. 682–687.
DACDAC-2009-YuanLP
Double patterning lithography friendly detailed routing with redundant via consideration (KY, KL, DZP), pp. 63–66.
HCIHCI-NT-2009-MaeshiroMSN #performance #similarity
Hypernetwork Model to Represent Similarity Details Applied to Musical Instrument Performance (TM, MM, KS, SiN), pp. 866–873.
DACDAC-2008-ChoYBP #named #performance #predict
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction (MC, KY, YB, DZP), pp. 504–509.
DATEDATE-2008-VelevG #comparison #encoding #problem #satisfiability
Comparison of Boolean Satisfiability Encodings on FPGA Detailed Routing Problems (MNV, PG), pp. 1268–1273.
CSCWCSCW-2008-ReillyMWI #using
Small details: using one device to navigate together (DFR, BM, CRW, KMI), pp. 253–256.
MODELSMoDELS-2008-NugrohoFC #analysis #empirical #fault #modelling #uml
Empirical Analysis of the Relation between Level of Detail in UML Models and Defect Density (AN, BF, MRVC), pp. 600–614.
MODELSMoDELS-2008-NugrohoFC #analysis #empirical #fault #modelling #uml
Empirical Analysis of the Relation between Level of Detail in UML Models and Defect Density (AN, BF, MRVC), pp. 600–614.
WCREWCRE-J-2005-SuttonM07 #c++ #modelling #uml
Recovering UML class models from C++: A detailed explanation (AS, JIM), pp. 212–229.
SACSAC-2007-TengC #community #mining #mobile
Mining communities of acquainted mobile users on call detail records (WGT, MCC), pp. 957–958.
ESEC-FSEESEC-FSE-2007-CottrellCWD
Determining detailed structural correspondence for generalization tasks (RC, JJCC, RJW, JD), pp. 165–174.
DLTDLT-2006-Paun
Languages in Membrane Computing: Some Details for Spiking Neural P Systems (GP), pp. 20–35.
FSEFSE-2006-FilhoCFMGR #aspect-oriented #exception
Exceptions and aspects: the devil is in the details (FCF, NC, EF, RM, AG, CMFR), pp. 152–162.
DACDAC-2005-MitraYP #named #performance #simulation #using
RADAR: RET-aware detailed routing using fast lithography simulations (JM, PY, DZP), pp. 369–372.
DATEDATE-2005-BeckBKPLP #design #generative #implementation #logic #quality
Logic Design for On-Chip Test Clock Generation — Implementation Details and Impact on Delay Test Quality (MB, OB, MK, FP, XL, RP), pp. 56–61.
ICSEICSE-2005-KoAM #design #elicitation #ide #maintenance #requirements
Eliciting design requirements for maintenance-oriented IDEs: a detailed study of corrective and perfective maintenance tasks (AJK, HHA, BAM), pp. 126–135.
ICPRICPR-v3-2004-TsujiZHK #analysis #correlation
Levels of Detail Control Based on Correlation Analysis Between Surface Position and Direction (TT, HZ, TH, RK), pp. 622–625.
ICPRICPR-v4-2004-OrWCI #re-engineering #scalability
Large Scene Reconstruction with Local Details Recovery (SHO, KhW, MMYC, CYI), pp. 44–47.
RERE-2004-VinsenJC #case study #estimation
Use Case Estimation — The Devil is in the Detail (KV, DJ, GC), pp. 10–15.
DACDAC-2003-MaHDCCCG #analysis #optimisation
Dynamic global buffer planning optimization based on detail block locating and congestion analysis (YM, XH, SD, SC, YC, CKC, JG), pp. 806–811.
CSEETCSEET-2003-X03c
Abstraction — is it teachable? “The devil is in the detail”, p. 32.
DACDAC-2002-RaganSS #co-evolution #concurrent #cost analysis #design #hardware
A detailed cost model for concurrent use with hardware/software co-design (DR, PS, PS), pp. 269–274.
CHICHI-2002-SuhWRG #bibliography #documentation #interface
Popout prism: adding perceptual principles to overview+detail document interfaces (BS, AW, RR, AG), pp. 251–258.
CHICHI-2001-HornbaekF #bibliography #documentation #interface #linear #usability
Reading of electronic documents: the usability of linear, fisheye, and overview+detail interfaces (KH, EF), pp. 293–300.
ICPRICPR-v3-2000-ZhaMH #data type #multi #using
Dynamic Control of Mesh LODs (Levels of Detail) by Using a Multiresolution Mesh Data Structure (HZ, YM, TH), pp. 3505–3509.
SACSAC-1999-PittsC #simulation #visualisation
Peripherality Based Level of Detail Switching as a Visualization Enhancement of High-Risk Simulations (GP, DC), pp. 98–104.
DATEDATE-1998-Hetzel #graph #grid
A Sequential Detailed Router for Huge Grid Graphs (AH), pp. 332–338.
DATEDATE-1998-Vygen #algorithm #standard
Algorithms for Detailed Placement of Standard Cells (JV), pp. 321–324.
ICPRICPR-1998-FlorianiMP #3d #re-engineering #representation
Managing the level of detail in 3D shape reconstruction and representation (LDF, PM, EP), pp. 389–391.
KDDKDD-1997-KramerPH #machine learning #mining
Mining for Causes of Cancer: Machine Learning Experiments at Various Levels of Detail (SK, BP, CH), pp. 223–226.
ICPRICPR-1996-HusseinNO #analysis #using
Analysis of detailed patterns of contour shapes using wavelet local extrema (EH, YN, YO), pp. 335–339.
CHICHI-1994-TaniHYTF94a #bibliography #named #scalability
Courtyard: integrating shared overview on a large screen and per-user detail on individual screens (MT, MH, KY, KT, MF), pp. 44–50.
CHICHI-1991-MackinlayRC
The perspective wall: detail and context smoothly integrated (JDM, GGR, SKC), pp. 173–176.
CHICHI-1990-Carroll #human-computer #infinity
Infinite detail and emulation in an ontologically minimized HCI (JMC), pp. 321–328.
STOCSTOC-1989-BorodinRT #bound #sequence #traversal
Lower Bounds on the Length of Universal Traversal Sequences (Detailed Abstract) (AB, WLR, MT), pp. 562–573.
STOCSTOC-1989-ChandraRRST #graph
The Electrical Resistance of a Graph Captures its Commute and Cover Times (Detailed Abstract) (AKC, PR, WLR, RS, PT), pp. 574–586.
STOCSTOC-1987-Awerbuch #algorithm #distributed #problem #summary
Optimal Distributed Algorithms for Minimum Weight Spanning Tree, Counting, Leader Election and Related Problems (Detailed Summary) (BA), pp. 230–240.
LISPLFP-1986-Hudak #abstraction #semantics #summary
A Semantic Model of Reference Counting and its Abstraction (Detailed Summary) (PH), pp. 351–363.
ICSEICSE-1984-MohriOUTS #design #implementation #named #source code
PDAS: An Assistant for Detailed Design and Implementation of Programs (TM, EO, SU, TT, HS), pp. 108–115.
DACDAC-1983-TarolliH
Hierarchical circuit extraction with detailed parasitic capacitance (GMT, WJH), pp. 337–345.
STOCSTOC-1980-OvermarsV #maintenance
Dynamically Maintaining Configurations in the Plane (Detailed Abstract) (MHO, JvL), pp. 135–145.
DACDAC-1979-Marwedel #design
The MIMOLA design system: Detailed description of the software system (PM), pp. 59–63.
STOCSTOC-1969-Cook #automaton
Variations on Pushdown Machines (Detailed Abstract) (SAC), pp. 229–231.
STOCSTOC-1969-Savitch #nondeterminism #simulation #turing machine
Deterministic Simulation of Non-Deterministic Turing Machines (Detailed Abstract) (WJS), pp. 247–248.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.