Travelled to:2 × France
2 × USA
Collaborated with:N.Wehn K.Eckl B.Rohfleisch K.Antreich C.Legl A.Kölbl M.Münch R.Mehra J.Sproch
Talks about:technolog (2) boolean (2) power (2) optim (2) logic (2) level (2) map (2) decomposit (1) transform (1) algorithm (1)
Person: Bernd Wurth
DBLP: Wurth:Bernd
Contributed to:
2000
199619951994Wrote 6 papers:
- DATE-2000-MunchWWMS #automation #power management
- Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths (MM, NW, BW, RM, JS), pp. 624–631.
- DAC-1996-LeglWE #approach #design
- A Boolean Approach to Performance-Directed Technology Mapping for LUT-Based FPGA Designs (CL, BW, KE), pp. 730–733.
- DAC-1996-RohfleischKW
- Reducing Power Dissipation after Technology Mapping by Structural Transformations (BR, AK, BW), pp. 789–794.
- DAC-1995-RohfleischWA #analysis #logic #optimisation
- Logic Clause Analysis for Delay Optimization (BR, BW, KA), pp. 668–672.
- DAC-1995-WurthEA #algorithm #composition #functional #multi
- Functional Multiple-Output Decomposition: Theory and an Implicit Algorithm (BW, KE, KA), pp. 54–59.
- EDAC-1994-WurthW #logic #multi #optimisation #performance
- Efficient Calculation of Boolean Relations for Multi-Level Logic Optimization (BW, NW), pp. 630–634.