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Travelled to:
1 × Germany
2 × France
6 × USA
Collaborated with:
H.E.Graeb R.Schwencker B.Wurth M.Pronath F.Schenkel G.Stehr B.Rohfleisch K.Eckl M.Henftling H.C.Wittmann C.U.Wieser A.Kölbl J.H.Kukula R.F.Damiano J.Eckmueller S.Zizala
Talks about:
circuit (4) analysi (4) analog (4) method (3) design (3) optim (3) boundari (2) simul (2) delay (2) decomposit (1)

Person: Kurt Antreich

DBLP DBLP: Antreich:Kurt

Contributed to:

DAC 20032003
DAC 20022002
DATE 20022002
DAC 20012001
DATE 20002000
DATE 19991999
DAC 19951995
DAC 19941994
DAC 19931993

Wrote 10 papers:

DAC-2003-StehrGA #analysis #bound #performance #trade-off
Performance trade-off analysis of analog circuits by normal-boundary intersection (GS, HEG, KA), pp. 958–963.
DAC-2002-KolblKAD #simulation
Handling special constructs in symbolic simulation (AK, JHK, KA, RFD), pp. 105–110.
DATE-2002-PronathGA #design #fault #float
A Test Design Method for Floating Gate Defects (FGD) in Analog Integrated Circuits (MP, HEG, KA), pp. 78–83.
DAC-2001-SchenkelPZSGA #analysis #optimisation
Mismatch Analysis and Direct Yield Optimization by Spec-Wise Linearization and Feasibility-Guided Search (FS, MP, SZ, RS, HEG, KA), pp. 858–863.
DATE-2000-SchwenckerSGA #automation #bound #design
The Generalized Boundary Curve-A Common Method for Automatic Nominal Design and Design Centering of Analog Circuits (RS, FS, HEG, KA), pp. 42–47.
DATE-1999-SchwenckerEGA #automation #constraints
Automating the Sizing of Analog CMOS Circuits by Consideration of Structural Constraints (RS, JE, HEG, KA), pp. 323–327.
DAC-1995-RohfleischWA #analysis #logic #optimisation
Logic Clause Analysis for Delay Optimization (BR, BW, KA), pp. 668–672.
DAC-1995-WurthEA #algorithm #composition #functional #multi
Functional Multiple-Output Decomposition: Theory and an Implicit Algorithm (BW, KE, KA), pp. 54–59.
DAC-1994-HenftlingWA #fault #simulation
Path Hashing to Accelerate Delay Fault Simulation (MH, HCW, KA), pp. 522–526.
DAC-1993-GraebWA #analysis #optimisation #worst-case
Improved Methods for Worst-Case Analysis and Optimization Incorporating Operating Tolerances (HEG, CUW, KA), pp. 142–147.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.