BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × France
3 × USA
Collaborated with:
F.Kocan M.Abramovici J.T.d.Sousa A.T.Yang I.N.Hajj E.M.Rudnick J.G.Holm J.H.Patel D.Blaauw R.B.Mueller-Thuns J.A.Abraham J.T.Rahmeh
Talks about:
reconfigur (2) hardwar (2) generat (2) circuit (2) model (2) algorithm (1) sequenti (1) parallel (1) diagnosi (1) descript (1)

Person: Daniel G. Saab

DBLP DBLP: Saab:Daniel_G=

Contributed to:

DAC 19991999
DAC 19891989
DAC 19881988

Wrote 5 papers:

DAC-1999-AbramoviciSS #configuration management #hardware #satisfiability #using
A Massively-Parallel Easily-Scalable Satisfiability Solver Using Reconfigurable Hardware (MA, JTdS, DGS), pp. 684–690.
DAC-1999-KocanS #configuration management #fault #hardware
Dynamic Fault Diagnosis on Reconfigurable Hardware (FK, DGS), pp. 691–696.
EDAC-1994-RudnickHSP #algorithm #generative #search-based #testing
Application of Simple Genetic Algorithms to Sequential Circuit Test Generation (EMR, JGH, DGS, JHP), pp. 40–45.
DAC-1989-BlaauwSMAR #automation #behaviour #generative #modelling
Automatic Generation of Behavioral Models from Switch-Level Descriptions (DB, DGS, RBMT, JAA, JTR), pp. 179–184.
DAC-1988-SaabYH #modelling
Delay Modeling and Time of Bipolar Digital Circuits (DGS, ATY, INH), pp. 288–293.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.