Travelled to:1 × USA
3 × France
Collaborated with:V.D.Agrawal P.Y.K.Cheung M.Abramovici D.G.Saab F.M.Gonçalves J.P.Teixeira T.W.Williams
Talks about:defect (2) model (2) level (2) use (2) interconnect (1) reconfigur (1) parallel (1) diagnosi (1) scalabl (1) satisfi (1)
Person: José T. de Sousa
DBLP: Sousa:Jos=eacute=_T=_de
Contributed to:
2000
199919971994Wrote 4 papers:
- DATE-2000-SousaA #clustering #complexity #fault #modelling #using
- Reducing the Complexity of Defect Level Modeling Using the Clustering Effect (JTdS, VDA), pp. 640–644.
- DAC-1999-AbramoviciSS #configuration management #hardware #satisfiability #using
- A Massively-Parallel Easily-Scalable Satisfiability Solver Using Reconfigurable Hardware (MA, JTdS, DGS), pp. 684–690.
- EDTC-1997-SousaC
- Improved diagnosis of realistic interconnect shorts (JTdS, PYKC), pp. 501–505.
- EDAC-1994-SousaGTW #fault #modelling
- Fault Modeling and Defect Level Projections in Digital ICs (JTdS, FMG, JPT, TWW), pp. 436–442.