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Travelled to:
2 × USA
Collaborated with:
M.Kudlugi S.Hassoun C.Selvidge S.S.Sapatnekar E.Haritan K.Keutzer A.Devgan D.Kirkpatrick S.Meier T.Spyrou
Talks about:
architectur (1) processor (1) transact (1) reinvent (1) function (1) manycor (1) verif (1) unifi (1) simul (1) emul (1)

Person: Duaine Pryor

DBLP DBLP: Pryor:Duaine

Contributed to:

DAC 20082008
DAC 20012001

Wrote 2 papers:

DAC-2008-SapatnekarHKDKMPS #manycore
Reinventing EDA with manycore processors (SSS, EH, KK, AD, DK, SM, DP, TS), pp. 126–127.
DAC-2001-KudlugiHSP #architecture #functional #simulation #transaction #verification
A Transaction-Based Unified Simulation/Emulation Architecture for Functional Verification (MK, SH, CS, DP), pp. 623–628.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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