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Travelled to:
5 × USA
Collaborated with:
T.Alexander J.Apte H.Watanabe J.V.B.Jr. J.L.Ellis S.Dey F.Brglez
Talks about:
layout (3) circuit (2) system (2) resynthesi (1) methodolog (1) distribut (1) algorithm (1) techniqu (1) structur (1) standard (1)

Person: Gershon Kedem

DBLP DBLP: Kedem:Gershon

Contributed to:

HPCA 19961996
DAC 19911991
DAC 19901990
DAC 19871987
DAC 19831983
DAC 19821982

Wrote 6 papers:

HPCA-1996-AlexanderK #design #distributed #memory management
Distributed Prefetch-buffer/Cache Design for High-Performance Memory Systems (TA, GK), pp. 254–263.
DAC-1991-BrinerEK #parallel #simulation
Breaking the Barrier of Parallel Simulation of Digital Systems (JVBJ, JLE, GK), pp. 223–226.
DAC-1990-DeyBK #clustering
Corolla Based Circuit Partitioning and Resynthesis (SD, FB, GK), pp. 607–612.
DAC-1987-ApteK #layout #standard
Strip Layout: A New Layout Methodology for Standard Circuit Modules (JA, GK), pp. 363–369.
DAC-1983-KedemW #layout
Graph-optimization techniques for IC layout and compaction (GK, HW), pp. 113–120.
DAC-1982-Kedem #algorithm #data type #online
The quad-CIF tree: A data structure for hierarchical on-line algorithms (GK), pp. 352–357.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.