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Travelled to:
2 × Germany
Collaborated with:
J.A.Abraham J.Shin S.Kang
Talks about:
test (2) interconnect (1) synchron (1) interfac (1) boundari (1) multipl (1) system (1) scheme (1) calibr (1) speed (1)

Person: Hyunjin Kim

DBLP DBLP: Kim:Hyunjin

Contributed to:

DATE 20122012
DATE 19991999

Wrote 2 papers:

DATE-2012-KimA #interface
On-chip source synchronous interface timing test scheme with calibration (HK, JAA), pp. 1146–1149.
DATE-1999-ShinKK #bound #multi #testing
At-Speed Boundary-Scan Interconnect Testing in a Board with Multiple System Clocks (JS, HK, SK), p. 473–?.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.