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Travelled to:
1 × Mexico
1 × Spain
2 × USA
Collaborated with:
J.Duato M.E.Acacio J.González G.Bernabé R.F.Pascual G.D.Guerrero J.M.Cecilia P.E.López-de-Teruel A.Ruiz J.L.Sánchez H.E.P.Sánchez A.Negi J.R.T.Gil P.Stenström M.Hernández A.Inuggi S.N.Sotiropoulos
Talks about:
architectur (4) parallel (3) multiprocessor (2) reconfigur (2) directori (2) scalabl (2) network (2) memori (2) reduc (2) imag (2)

Person: José M. García

DBLP DBLP: Garc=iacute=a:Jos=eacute=_M=

Contributed to:

HPCA 20122012
PDP 20122012
HPCA 20072007
PDP 20052005
PDP 20032003
PDP 20022002
HPCA 20012001
ICPR v4 20002000
PDP 19981998
PDP 19931993

Wrote 11 papers:

HPCA-2012-NegiGAGS #hardware #lazy evaluation #memory management #named #scalability #transaction
π-TM: Pessimistic invalidation for scalable lazy hardware transactional memory (AN, JRTG, MEA, JMG, PS), pp. 141–152.
PDP-2012-GuerreroSCG #architecture #parallel
Parallelization of Virtual Screening in Drug Discovery on Massively Parallel Architectures (GDG, HEPS, JMC, JMG), pp. 588–595.
PDP-2012-HernandezGCGIS #estimation #using
Accelerating Fibre Orientation Estimation from Diffusion Weighted Magnetic Resonance Imaging Using GPUs (MH, GDG, JMC, JMG, AI, SNS), pp. 622–626.
HPCA-2007-PascualGAD #architecture #fault tolerance #protocol
A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures (RFP, JMG, MEA, JD), pp. 157–168.
PDP-2005-FernandezGBA #3d #architecture #optimisation #thread #video
Optimizing a 3D-FWT Video Encoder for SMPs and HyperThreading Architectures (RFP, JMG, GB, MEA), pp. 76–83.
PDP-2003-BernabeGG #3d #execution #streaming
Reducing 3D Wavelet Transform Execution Time through the Streaming SIMD Extensions (GB, JMG, JG), pp. 49–56.
PDP-2002-AcacioGGD #integration #latency #multi
Reducing the Latency of L2 Misses in Shared-Memory Multiprocessors through On-Chip Directory Integration (MEA, JG, JMG, JD), pp. 368–375.
HPCA-2001-AcacioGGD #architecture #multi #scalability
A New Scalable Directory Architecture for Large-Scale Multiprocessors (MEA, JG, JMG, JD), pp. 97–106.
ICPR-v4-2000-Lopez-de-TeruelRG #algorithm #image #parallel
A Parallel Algorithm for Tracking of Segments in Noisy Edge Images (PELdT, AR, JMG), pp. 4807–4811.
PDP-1998-SanchezDG #configuration management #network #pipes and filters #using
Using channel pipelining in reconfigurable interconnection networks (JLS, JD, JMG), pp. 120–126.
PDP-1993-0001D #configuration management #multi #network #trade-off
Dynamic reconfiguration of multicomputer networks: limitations and tradeoffs (JMG, JD), pp. 317–323.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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