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Travelled to:
1 × Canada
1 × China
1 × Germany
2 × France
7 × USA
Collaborated with:
M.Karlsson F.Dahlgren H.Dybdahl T.Lundqvist J.Skeppstedt S.Borkar N.P.Jouppi J.Hollmann A.Ardö M.Kämpe M.Dubois A.Negi J.R.T.Gil M.E.Acacio J.M.García A.Bardizbanyan P.Gavin D.B.Whalley M.Själander P.Larsson-Edefors S.A.McKee
Talks about:
multiprocessor (4) prefetch (3) access (3) base (3) use (3) techniqu (2) hardwar (2) analysi (2) memori (2) integr (2)

Person: Per Stenström

DBLP DBLP: Stenstr=ouml=m:Per

Contributed to:

DATE 20142014
CGO 20132013
HPCA 20122012
DATE 20072007
HPCA 20072007
HPCA 20062006
ECDL 20032003
HPCA 20022002
HPCA 20002000
LCTES 19981998
HPCA 19961996
HPCA 19951995
ASPLOS 19941994

Wrote 13 papers:

DATE-2014-Stenstrom #effectiveness #performance #resource management #towards
Effective resource management towards efficient computing (PS), p. 1.
CGO-2013-BardizbanyanGWSLMS #data access #performance #using
Improving data access efficiency by using a tagless access buffer (TAB) (AB, PG, DBW, MS, PLE, SAM, PS), p. 11.
HPCA-2012-NegiGAGS #hardware #lazy evaluation #memory management #named #scalability #transaction
π-TM: Pessimistic invalidation for scalable lazy hardware transactional memory (AN, JRTG, MEA, JMG, PS), pp. 141–152.
DATE-2007-BorkarJS #integration
Microprocessors in the era of terascale integration (SB, NPJ, PS), pp. 237–242.
HPCA-2007-DybdahlS #adaptation #clustering #multi
An Adaptive Shared/Private NUCA Cache Partitioning Scheme for Chip Multiprocessors (HD, PS), pp. 2–12.
HPCA-2006-Stenstrom #multi
Chip-multiprocessing and beyond (PS), p. 109.
ECDL-2003-HollmannAS #distributed #documentation #evaluation #library
An Evaluation of Document Prefetching in a Distributed Digital Library (JH, AA, PS), pp. 276–287.
HPCA-2002-KampeSD #analysis #branch #fourier #predict #using
The FAB Predictor: Using Fourier Analysis to Predict the Outcome of Conditional Branches (MK, PS, MD), pp. 223–232.
HPCA-2000-KarlssonDS #data type #linked data #open data
A Prefetching Technique for Irregular Accesses to Linked Data Structures (MK, FD, PS), pp. 206–217.
LCTES-1998-LundqvistS #analysis #simulation #using
Integrating Path and Timing Analysis Using Instruction-Level Simulation Techniques (TL, PS), pp. 1–15.
HPCA-1996-KarlssonS #clustering #evaluation #multi #performance
Performance Evaluation of a Cluster-Based Multiprocessor Built from ATM Switches and Bus-Based Multiprocessor Servers (MK, PS), pp. 4–13.
HPCA-1995-DahlgrenS #effectiveness #multi
Effectiveness of Hardware-Based Stride and Sequential Prefetching in Shared-Memory Multiprocessors (FD, PS), pp. 68–77.
ASPLOS-1994-SkeppstedtS #algorithm #compilation #protocol
Simple Compiler Algorithms to Reduce Ownership Operhead in Cache Coherence Protocols (JS, PS), pp. 286–296.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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