BibSLEIGH — Jose

Travelled to:

1 × Germany
1 × Mexico
1 × Switzerland
1 × United Kingdom
2 × France
7 × USA

Collaborated with:

P.López A.Robles J.M.García F.Silla J.Flich E.Baydal M.E.Acacio J.L.Sánchez B.Cuesta J.C.Sancho J.M.Martínez H.Montaner S.Petit S.Yalamanchili T.N.Frinós J.González R.Alcover L.Zúnica ∅ C.G.Requena M.E.Gómez J.Ferrer F.J.Quiles J.Sahuquillo C.Hernández B.V.Dao H.Fröning R.F.Pascual P.Morillo J.M.Orduña M.Fernández M.P.Malumbres X.Molero V.Santonja D.B.Garzón J.A.Villar F.J.Andujar F.J.Alfaro D.B.Rayo J.S.Borrás H.H.Mohamed D.Bautista H.Hassan A.Mejia S.Reinemo T.Skeie E.J.Kim K.H.Yum C.R.Das M.S.Yousif J.C.Martínez R.Casado A.Bermúdez B.Caminero D.S.Love I.Johnson F.Naven P.J.García V.Lorente A.Valero R.Canal

Talks about:

network (14) rout (9) interconnect (6) perform (6) architectur (5) mechan (5) reduc (5) deadlock (4) support (4) congest (4)

Person: José Duato

DBLP: Duato:Jos=eacute=

Contributed to:

2014

2013

2012

2011

2010

2008

2007

2005

2004

2003

2002

2001

2000

1999

1998

1997

1996

1993

Wrote 39 papers:

PDP-2014-GarzonGGLD #fault tolerance #named #performance: FT-RUFT: A Performance and Fault-Tolerant Efficient Indirect Topology (DBG, CGR, MEG, PL, JD), pp. 405–409.
DATE-2013-LorenteVSPCLD #power management #ram: Combining RAM technologies for hard-error recovery in L1 data caches working at very-low power modes (VL, AV, JS, SP, RC, PL, JD), pp. 83–88.
PDP-2012-VillarASAD: Optimal Configuration of High-Radix Combined Switches (JAV, FJA, JLS, FJA, JD), pp. 102–111.
CIKM-2011-MontanerSFD #clustering #database #named: MEMSCALE: in-cluster-memory databases (HM, FS, HF, JD), pp. 2569–2572.
DATE-2010-HernandezSD #process: A methodology for the characterization of process variation in NoC links (CH, FS, JD), pp. 685–690.
HPDC-2010-MontanerSD #low cost #memory management: A practical way to extend shared memory support beyond a motherboard at low cost (HM, FS, JD), pp. 155–166.
PDP-2010-FerrerBRLD #scalability: A Scalable and Early Congestion Management Mechanism for MINs (JLF, EB, AR, PL, JD), pp. 43–50.
PDP-2010-RayoBMPD #embedded #manycore #parallel #power management #requirements #thread: Balancing Task Resource Requirements in Embedded Multithreaded Multicore Processors to Reduce Power Consumption (DBR, JSB, HHM, SP, JD), pp. 200–204.
SAC-2010-BautistaSHPD #clustering #power management #requirements #set: Dynamic task set partitioning based on balancing resource requirements and utilization to reduce power consumption (DB, JS, HH, SP, JD), pp. 521–526.
PDP-2008-CuestaRD #multi: Improving Token Coherence by Multicast Coherence Messages (BC, AR, JD), pp. 269–273.
PDP-2008-RequenaGLD #network: Exploiting Wiring Resources on Interconnection Network: Increasing Path Diversity (CGR, MEG, PL, JD), pp. 20–29.
HPCA-2007-PascualGAD #architecture #fault tolerance #protocol: A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures (RFP, JMG, MEA, JD), pp. 157–168.
PDP-2007-CuestaRD #effectiveness #protocol: An Effective Starvation Avoidance Mechanism to Enhance the Token Coherence Protocol (BC, AR, JD), pp. 47–54.
PDP-2007-FerrerBRLD: Congestion Management in MINs through Marked and Validated Packets (JLF, EB, AR, PL, JD), pp. 254–261.
PDP-2007-MejiaFDRS #performance: Boosting Ethernet Performance by Segment-Based Routing (AM, JF, JD, SAR, TS), pp. 55–62.
HPCA-2005-DuatoJFNGF #effectiveness #multi #network #scalability: A New Scalable and Cost-Effective Congestion Management Strategy for Lossless Multistage Interconnection Networks (JD, IJ, JF, FN, PJG, TNF), pp. 108–119.
PDP-2005-MorilloOFD #distributed: A Method for Providing QoS in Distributed Virtual Environments (PM, JMO, MF, JD), pp. 152–159.
PDP-2004-DuatoFN #effectiveness #multi: A Cost-Effective Technique to Reduce HOL Blocking in Single-Stage and Multistage Switch Fabrics (JD, JF, TNF), pp. 48–53.
HPCA-2003-KimYDYD #architecture #performance: Performance Enhancement Techniques for InfiniBand? Architecture (EJK, KHY, CRD, MSY, JD), pp. 253–262.
PDP-2003-MartinezFRLD #adaptation #network: Supporting Adaptive Routing in InfiniBand Networks (JCM, JF, AR, PL, JD), pp. 165–172.
PDP-2002-AcacioGGD #integration #latency #multi: Reducing the Latency of L2 Misses in Shared-Memory Multiprocessors through On-Chip Directory Integration (MEA, JG, JMG, JD), pp. 368–375.
PDP-2002-BaydalLD #adaptation #algorithm: Increasing the Adaptivity of Routing Algorithms for k-ary n-cubes (EB, PL, JD), pp. 455–462.
PDP-2002-FlichMLD #latency: Removing the Latency Overhead of the ITB Mechanism in COWs with Source Routing (JF, MPM, PL, JD), pp. 463–470.
PDP-2002-SanchoRD #algorithm #network #performance: Performance Sensitivity of Routing Algorithms to Failures in Networks of Workstations with Regular and Irregular Topologies (JCS, AR, JD), pp. 81–90.
HPCA-2001-AcacioGGD #architecture #multi #scalability: A New Scalable Directory Architecture for Large-Scale Multiprocessors (MEA, JG, JMG, JD), pp. 97–106.
PDP-2001-BaydalLD #network: A Congestion Control Mechanism for Wormhole Networks (EB, PL, JD), pp. 19–26.
PDP-2001-MoleroSSD #network #on the: On the Impact of Message Packetization in Networks of Workstations with Irregular Topology (XM, FS, VS, JD), pp. 3–10.
PDP-2001-SanchoRD #behaviour #distributed #on the #using: On the Relative Behavior of Source and Distributed Routing in NOWs Using Up/Down Routing Schemes (JCS, AR, JD), pp. 11–18.
HPCA-2000-CasadoBQSD #configuration management #evaluation #network #performance: Performance Evaluation of Dynamic Reconfiguration in High-Speed Local Area Networks (RC, AB, FJQ, JLS, JD), pp. 85–96.
HPCA-1999-DuatoYCLQ #architecture #design #multi #named #trade-off: MMR: A High-Performance Multimedia Router — Architecture and Design Trade-Offs (JD, SY, BC, DSL, FJQ), pp. 300–309.
HPCA-1999-MartinezLD #concurrent #detection #performance: Impact of Buffer Size on the Efficiency of Deadlock Detection (JMM, PL, JD), pp. 315–318.
PDP-1999-LopezADZ #design #network #optimisation #robust #throughput: Optimizing network throughput: optimal versus robust design (PL, RA, JD, LZ), pp. 45–52.
HPCA-1998-LopezMD #concurrent #detection #distributed #network #performance: A Very Efficient Distributed Deadlock Detection Mechanism for Wormhole Networks (PL, JMM, JD), pp. 57–66.
PDP-1998-Duato #adaptation #concurrent #network: Deadlock avoidance and adaptive routing in interconnection networks (JD), pp. 359–364.
PDP-1998-SanchezDG #configuration management #network #pipes and filters #using: Using channel pipelining in reconfigurable interconnection networks (JLS, JD, JMG), pp. 120–126.
HPCA-1997-DaoYD #architecture #communication #multi #network: Architectural Support for Reducing Communication Overhead in Multiprocessor Interconnection Networks (BVD, SY, JD), pp. 343–352.
PDP-1997-RoblesD #adaptation #concurrent #multi: Multilink extension to support deadlock-free adaptive non-minimal routing (AR, JD), pp. 431–436.
PDP-1996-AlcoverLDZ #analysis #design #interactive #network #statistics: Interconnection Network Design: A Statistical Analysis of Interactions between Factors (RA, PL, JD, LZ), pp. 211–218.
PDP-1993-0001D #configuration management #multi #network #trade-off: Dynamic reconfiguration of multicomputer networks: limitations and tradeoffs (JMG, JD), pp. 317–323.