Proceedings of the 13th International Conference on High-Performance Computer Architecture
HPCA, 2007.
@proceedings{HPCA-2007, address = "Phoenix, Arizona, USA", ee = "http://www.computer.org/csdl/proceedings/hpca/2007/0804/00/index.html", isbn = "1-4244-0804-0", publisher = "{IEEE Computer Society}", title = "{Proceedings of the 13th International Conference on High-Performance Computer Architecture}", year = 2007, }
Contents (32 items)
- HPCA-2007-Dally
- Interconnect-Centric Computing (WJD), p. 1.
- HPCA-2007-DybdahlS #adaptation #clustering #multi
- An Adaptive Shared/Private NUCA Cache Partitioning Scheme for Chip Multiprocessors (HD, PS), pp. 2–12.
- HPCA-2007-RangerRPBK #manycore #pipes and filters
- Evaluating MapReduce for Multi-core and Multiprocessor Systems (CR, RR, AP, GRB, CK), pp. 13–24.
- HPCA-2007-ZhongLM #architecture #hybrid #manycore #parallel #thread
- Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications (HZ, SAL, SAM), pp. 25–36.
- HPCA-2007-AnnavaramGR #variability
- Implications of Device Timing Variability on Full Chip Timing (MA, EG, PR), pp. 37–45.
- HPCA-2007-KatayamaO #memory management
- Optical Interconnect Opportunities for Future Server Memory Systems (YK, AO), pp. 46–50.
- HPCA-2007-SrinathMKP #feedback #hardware #performance
- Feedback Directed Prefetching: Improving the Performance and Bandwidth-Efficiency of Hardware Prefetchers (SS, OM, HK, YNP), pp. 63–74.
- HPCA-2007-QuinonesPG #branch #execution #predict
- Improving Branch Prediction and Predicated Execution in Out-of-Order Processors (EQ, JMP, AG), pp. 75–84.
- HPCA-2007-ZhangTC #adaptation #thread
- Accelerating and Adapting Precomputation Threads for Effcient Prefetching (WZ, DMT, BC), pp. 85–95.
- HPCA-2007-Pawlowski #challenge #manycore #perspective #research
- Petascale Computing Research Challenges — A Manycore Perspective (SP), p. 96.
- HPCA-2007-ChafiCCMMBKO #approach #memory management #scalability #transaction
- A Scalable, Non-blocking Approach to Transactional Memory (HC, JC, BDC, AM, CCM, WB, CK, KO), pp. 97–108.
- HPCA-2007-GaneshJWJ #architecture #comprehension #memory management #scalability
- Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling (BG, AJ, DW, BLJ), pp. 109–120.
- HPCA-2007-ZhouTZ #concurrent #detection #named
- HARD: Hardware-Assisted Lockset-based Race Detection (PZ, RT, YZ), pp. 121–132.
- HPCA-2007-CezeMPT #architecture #named
- Colorama: Architectural Support for Data-Centric Synchronization (LC, PM, CvP, JT), pp. 133–144.
- HPCA-2007-MeixnerS #detection #fault #online
- Error Detection via Online Checking of Cache Coherence with Token Coherence Signatures (AM, DJS), pp. 145–156.
- HPCA-2007-PascualGAD #architecture #fault tolerance #protocol
- A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures (RFP, JMG, MEA, JD), pp. 157–168.
- HPCA-2007-RacunasCMM #fault
- Perturbation-based Fault Screening (PR, KC, SM, SSM), pp. 169–180.
- HPCA-2007-LiY #correctness #fault tolerance
- Application-Level Correctness and its Impact on Fault Tolerance (XL, DY), pp. 181–192.
- HPCA-2007-PuttaswamyL #3d #architecture
- Thermal Herding: Microarchitecture Techniques for Controlling Hotspots in High-Performance 3D-Integrated Processors (KP, GHL), pp. 193–204.
- HPCA-2007-ChoiKSSWL #modelling
- Modeling and Managing Thermal Profiles of Rack-mounted Servers with ThermoStat (JC, YK, AS, JS, QW, JL), pp. 205–215.
- HPCA-2007-ClarkHYMF #hardware #lightweight #using
- Liquid SIMD: Abstracting SIMD Hardware using Lightweight Dynamic Mapping (NC, AH, SY, SAM, KF), pp. 216–227.
- HPCA-2007-AlameldeenW #interactive #multi
- Interactions Between Compression and Prefetching in Chip Multiprocessors (ARA, DAW), pp. 228–239.
- HPCA-2007-EyermanE #parallel #policy #smt
- A Memory-Level Parallelism Aware Fetch Policy for SMT Processors (SE, LE), pp. 240–249.
- HPCA-2007-QureshiSP #capacity #word
- Line Distillation: Increasing Cache Capacity by Filtering Unused Words in Cache Lines (MKQ, MAS, YNP), pp. 250–259.
- HPCA-2007-YenBMMVHSW #hardware #memory management #named #transaction
- LogTM-SE: Decoupling Hardware Transactional Memory from Caches (LY, JB, MRM, KEM, HV, MDH, MMS, DAW), pp. 261–272.
- HPCA-2007-VenkataramaniRSP #debugging #memory management #monitoring #named #performance #programmable
- MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging (GV, BR, YS, MP), pp. 273–284.
- HPCA-2007-ShaoD #order #scheduling
- A Burst Scheduling Access Reordering Mechanism (JS, BTD), pp. 285–294.
- HPCA-2007-AgarwalMWSF #parallel
- Exploiting Postdominance for Speculative Parallelization (MA, KM, KMW, SSS, MIF), pp. 295–305.
- HPCA-2007-ShaferCMRCZW #concurrent #monitoring #network #virtual machine
- Concurrent Direct Network Access for Virtual Machine Monitors (JS, DC, AM, SR, ALC, WZ, PW), pp. 306–317.
- HPCA-2007-JinKY #design #network #scalability
- A Domain-Specific On-Chip Network Design for Large Scale Cache Systems (YJ, EJK, KHY), pp. 318–327.
- HPCA-2007-ChengCD #adaptation #protocol
- An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing (LC, JBC, DD), pp. 328–339.
- HPCA-2007-LeeB #architecture #design #modelling
- Illustrative Design Space Studies with Microarchitectural Regression Models (BCL, DMB), pp. 340–351.
6 ×#architecture
5 ×#memory management
4 ×#named
3 ×#adaptation
3 ×#hardware
3 ×#manycore
3 ×#parallel
3 ×#scalability
2 ×#concurrent
2 ×#design
5 ×#memory management
4 ×#named
3 ×#adaptation
3 ×#hardware
3 ×#manycore
3 ×#parallel
3 ×#scalability
2 ×#concurrent
2 ×#design