Travelled to:
1 × China
1 × France
1 × Germany
1 × Switzerland
2 × USA
Collaborated with:
Q.Xu B.Eklow K.Chakrabarty L.Huang D.Ma F.Ichikawa Y.Liu L.Gong S.Jiang R.Wang F.Ye F.Xie X.Liang N.Jing J.Yan Z.Zheng Y.Li S.Yan Z.Chen
Talks about:
repair (2) effect (2) stack (2) learn (2) test (2) tsv (2) architectur (1) framework (1) dimension (1) softwar (1)
Person: Li Jiang
DBLP: Jiang:Li
Contributed to:
Wrote 7 papers:
- DAC-2015-XieLXCJJ
- Jump test for metallic CNTs in CNFET-based SRAM (FX, XL, QX, KC, NJ, LJ), p. 6.
- DAC-2013-JiangYXCE #3d #effectiveness #on the #performance
- On effective and efficient in-field TSV repair for stacked 3D ICs (LJ, FY, QX, KC, BE), p. 6.
- DATE-2012-JiangXE #3d #effectiveness #on the
- On effective TSV repair for 3D-stacked ICs (LJ, QX, BE), pp. 793–798.
- SIGIR-2010-YanZJLYC #framework #learning
- A co-learning framework for learning user search intents from rule-generated training data (JY, ZZ, LJ, YL, SY, ZC), pp. 895–896.
- DATE-2009-JiangHX #3d #architecture #design #optimisation
- Test architecture design and optimization for three-dimensional SoCs (LJ, LH, QX), pp. 220–225.
- HIMI-IIE-2007-MaILJ #using
- Use of Chinese Short Messages (DM, FI, YL, LJ), pp. 582–591.
- ASE-2019-GongJWJ #empirical #evaluation #fault #predict
- Empirical Evaluation of the Impact of Class Overlap on Software Defect Prediction (LG, SJ, RW, LJ), pp. 698–709.