Travelled to:1 × USA
2 × Germany
3 × France
Collaborated with:L.Macchiarulo P.Giaccone M.Crepaldi M.Graziano M.Zamboni M.Cutrupi S.Tota M.R.Roch L.Rostagno
Talks about:system (3) design (3) base (3) methodolog (2) insensit (2) latenc (2) uwb (2) new (2) no (2) multiprocessor (1)
Person: Mario R. Casu
DBLP: Casu:Mario_R=
Contributed to:
2015201020072005
20042004Wrote 7 papers:
- DATE-2015-CasuG
- Rate-based vs delay-based control for DVFS in NoC (MRC, PG), pp. 1096–1101.
- DATE-2010-CutrupiCCG #detection #flexibility
- A flexible UWB Transmitter for breast cancer detection imaging systems (MC, MC, MRC, MG), pp. 1076–1081.
- DATE-2010-TotaCRRZ #architecture #hybrid #message passing #multi #named
- MEDEA: a hybrid shared-memory/message-passing multiprocessor NoC-based architecture (ST, MRC, MRR, LR, MZ), pp. 45–50.
- DATE-2007-CrepaldiCGZ #design #effectiveness #top-down
- An effective AMS top-down methodology applied to the design of a mixed-signal UWB system-on-chip (MC, MRC, MG, MZ), pp. 1424–1429.
- DATE-2005-CasuM #design #pipes and filters
- A New System Design Methodology for Wire Pipelined SoC (MRC, LM), pp. 944–945.
- DAC-2004-CasuM #approach #design #latency
- A new approach to latency insensitive design (MRC, LM), pp. 576–581.
- DATE-v2-2004-CasuM #implementation #latency #protocol
- Issues in Implementing Latency Insensitive Protocols (MRC, LM), pp. 1390–1391.