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Travelled to:
3 × France
3 × Germany
3 × USA
Collaborated with:
M.R.Casu E.Macii M.Marek-Sadowska M.Poncino L.Benini X.Gao S.Shu A.Macii
Talks about:
insensit (2) system (2) layout (2) latenc (2) design (2) steer (2) wire (2) wave (2) fsms (2) new (2)

Person: Luca Macchiarulo

DBLP DBLP: Macchiarulo:Luca

Contributed to:

DATE 20102010
DATE 20052005
DAC 20042004
DATE v2 20042004
DATE 20022002
DAC 20012001
DATE 20012001
DAC 20002000
DATE 20002000

Wrote 9 papers:

DATE-2010-GaoM #lazy evaluation
Enhancing double-patterning detailed routing with lazy coloring and within-path conflict avoidance (XG, LM), pp. 1279–1284.
DATE-2005-CasuM #design #pipes and filters
A New System Design Methodology for Wire Pipelined SoC (MRC, LM), pp. 944–945.
DAC-2004-CasuM #approach #design #latency
A new approach to latency insensitive design (MRC, LM), pp. 576–581.
DATE-v2-2004-CasuM #implementation #latency #protocol
Issues in Implementing Latency Insensitive Protocols (MRC, LM), pp. 1390–1391.
DATE-2002-MacchiaruloMP #energy
Wire Placement for Crosstalk Energy Minimization in Address Buses (LM, EM, MP), pp. 158–162.
DAC-2001-BeniniMMMP #architecture #embedded #layout #memory management #synthesis
From Architecture to Layout: Partitioned Memory Synthesis for Embedded Systems-on-Chip (LB, LM, AM, EM, MP), pp. 784–789.
DATE-2001-MacchiaruloBM #generative #layout #on the fly
On-the-fly layout generation for PTL macrocells (LM, LB, EM), pp. 546–551.
DAC-2000-MacchiaruloM
Wave-steering one-hot encoded FSMs (LM, MMS), pp. 357–360.
DATE-2000-MacchiaruloSM
Wave Steered FSMs (LM, SMS, MMS), pp. 270–276.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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