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Travelled to:
1 × Canada
1 × China
1 × France
2 × United Kingdom
8 × USA
Collaborated with:
B.R.d.Supinski B.Rountree T.Gamblin S.A.McKee D.K.Lowenthal A.Marathe R.Harris D.A.Ellsworth A.D.Malony R.John O.Vermesan K.Kriegel T.Mu J.Tao M.Gerndt A.Schmidt R.Wismüller O.Pearce N.M.Amato E.Ipek R.Caruana G.Bronevetsky D.Marques K.Pingali P.K.Szwed S.Mitra I.Laguna D.H.Ahn S.Bagchi K.E.Isaacs A.Bhatele P.Bremer B.Hamann S.Lyberis P.Pratikakis D.S.Nikolopoulos B.C.Lee D.M.Brooks K.Singh T.Patki A.Sasidharan M.Maiterth X.Yuan
Talks about:
parallel (4) perform (4) applic (4) comput (3) architectur (2) constrain (2) analysi (2) memori (2) execut (2) effici (2)

Person: Martin Schulz

DBLP DBLP: Schulz:Martin

Contributed to:

HPDC 20152015
PPoPP 20152015
HPDC 20142014
PLDI 20142014
PPoPP 20142014
DATE 20132013
HPDC 20132013
ISMM 20122012
PPoPP 20072007
ASPLOS 20062006
ASPLOS 20042004
SOFTVIS 20032003
HPDC 20022002
PDP 20022002

Wrote 15 papers:

HPDC-2015-EllsworthMRS #named
POW: System-wide Dynamic Reallocation of Limited Power in HPC (DAE, ADM, BR, MS), pp. 145–148.
HPDC-2015-PatkiLSMRSS #performance #resource management
Practical Resource Management in Power-Constrained, High Performance Computing (TP, DKL, AS, MM, BR, MS, BRdS), pp. 121–132.
Decoupled load balancing (OP, TG, BRdS, MS, NMA), pp. 267–268.
HPDC-2014-MaratheHLSRS #effectiveness #execution
Exploiting redundancy for cost-effective, time-constrained execution of HPC applications on amazon EC2 (AM, RH, DKL, BRdS, BR, MS), pp. 279–290.
PLDI-2014-MitraLABSG #analysis #debugging #parallel #scalability
Accurate application progress analysis for large-scale parallel debugging (SM, IL, DHA, SB, MS, TG), p. 23.
PPoPP-2014-IsaacsGBBSH #execution #identification #logic #parallel
Extracting logical structure and identifying stragglers in parallel execution traces (KEI, TG, AB, PTB, MS, BH), pp. 397–398.
Semiconductor technologies for smart mobility management (RJ, MS, OV, KK), pp. 1749–1752.
HPDC-2013-MaratheHLSRSY #case study #comparative
A comparative study of high-performance computing on the cloud (AM, RH, DKL, BRdS, BR, MS, XY), pp. 239–250.
ISMM-2012-LyberisPNSGS #memory management #message passing
The myrmics memory allocator: hierarchical, message-passing allocation for global address spaces (SL, PP, DSN, MS, TG, BRdS), pp. 15–24.
PPoPP-2007-LeeBSSSM #learning #modelling #parallel #performance
Methods of inference and learning for performance modeling of parallel applications (BCL, DMB, BRdS, MS, KS, SAM), pp. 249–258.
ASPLOS-2006-IpekMCSS #architecture #design #modelling #predict
Efficiently exploring architectural design spaces via predictive modeling (EI, SAM, RC, BRdS, MS), pp. 195–206.
ASPLOS-2004-BronevetskyMPSS #memory management #source code
Application-level checkpointing for shared memory programs (GB, DM, KP, PKS, MS), pp. 235–247.
SOFTVIS-2003-MuTSM #architecture #interactive #locality #optimisation
Interactive Locality Optimization on NUMA Architectures (TM, JT, MS, SAM), pp. 133–141.
HPDC-2002-Schulz #clustering #parallel #performance #semantics #using
Using Semantic Information to Guide Efficient Parallel I/O on Clusters (MS), pp. 135–142.
PDP-2002-GerndtSSW #analysis #approach #automation #distributed #performance
Performance Analysis for Teraflop Computers: A Distributed Automatic Approach (MG, AS, MS, RW), pp. 23–30.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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