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Travelled to:
1 × France
2 × USA
Collaborated with:
S.Bobba Y.Leblebici G.D.Micheli P.Gaillardon L.G.Amarù D.Sacchetto
Talks about:
nanowir (3) transistor (2) polar (2) doubl (2) gate (2) asic (2) synthesi (1) structur (1) silicon (1) regular (1)

Person: Michele De Marchi

DBLP DBLP: Marchi:Michele_De

Contributed to:

DAC 20132013
DATE 20132013
DAC 20122012

Wrote 3 papers:

DAC-2013-GaillardonMABSLM #towards #using
Towards structured ASICs using polarity-tunable Si nanowire transistors (PEG, MDM, LGA, SB, DS, YL, GDM), p. 4.
DATE-2013-GaillardonABMSLM
Vertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs (PEG, LGA, SB, MDM, DS, YL, GDM), pp. 625–630.
DAC-2012-BobbaMLM #physics #synthesis
Physical synthesis onto a Sea-of-Tiles with double-gate silicon nanowire transistors (SB, MDM, YL, GDM), pp. 42–47.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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