BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
4 × USA
Collaborated with:
D.Z.Pan R.Puri H.Xiang H.Ren K.Yuan Y.Ban D.Brand R.Bordawekar U.Finkler V.KulandaiSamy
Talks about:
router (4) effici (2) base (2) box (2) lithographi (1) algorithm (1) progress (1) printabl (1) parallel (1) predict (1)

Person: Minsik Cho

DBLP DBLP: Cho:Minsik

Contributed to:

VLDB 20152015
DAC 20102010
DAC 20082008
DAC 20072007
DAC 20062006

Wrote 5 papers:

VLDB-2015-ChoBBFKP #algorithm #named #parallel #performance
PARADIS: An Efficient Parallel Algorithm for In-place Radix Sort (MC, DB, RB, UF, VK, RP), pp. 1518–1529.
DAC-2010-ChoRXP #network #using
History-based VLSI legalization using network flow (MC, HR, HX, RP), pp. 286–291.
DAC-2008-ChoYBP #named #performance #predict
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction (MC, KY, YB, DZP), pp. 504–509.
DAC-2007-ChoXPP #named
TROY: Track Router with Yield-driven Wire Planning (MC, HX, RP, DZP), pp. 55–58.
DAC-2006-ChoP #named
BoxRouter: a new global router based on box expansion and progressive ILP (MC, DZP), pp. 373–378.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.